A8439 ALLEGRO
Document overview
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Technical content
Figure 1. Typical circuit with separate power supply to transformer Figure 2. Typical circuit with single power supply
Description
The A8439 is a highly integrated IC that charges photoflash capacitors for digital and film cameras. An integrated MOSFET switch drives the transformer in a flyback topology. It also features an integrated IGBT driver that facilitates the flash discharge function and saves board space. The CHARGE pin enables the A8439 and starts the charging of the output capacitor. When the designated output voltage is reached, the A8439 stops the charging until the CHARGE pin is toggled again, or when output voltage falls below 90% of the designated value. Pulling the CHARGE pin low stops the charging. The ¯D¯ ¯O¯ ¯N¯ ¯E¯ pin is an open-drain indicator of when the designated output voltage is reached. The peak current limit can be adjusted to eight different levels between 270 mA and 1.4 A, by clocking the CHARGE pin. This allows the user to operate the flash even at low battery voltages. The A8439 can be used with two Alkaline/NiMH/NiCAD or one single-cell Li+ battery connected to the transformer primary. Connect the VIN pin to a 3.0 to 5.5 V supply, which can be either the system rail or the Li+ battery, if used. The A8439 is available in a very low profile (0.75 mm) 10- terminal 3×3 mm MLP/TDFN package, making it ideal for space-constrained applications. It is lead (Pb) free, with 100% matte-tin leadframe plating. Applications include the following: Features and Benefits ▪ Power with 1 Li+ or 2 Alkaline/NiMH/NiCAD batteries ▪ Adjustable output voltage ▪ Auto-refresh ▪ >75% efficiency ▪ Eight-level, digitally-programmable current limit ▪ Charge complete indication ▪ Integrated IGBT driver with trigger ▪ No primary-side Schottky diode needed ▪ Low-profile package (0.75 mm nominal height) Photoflash Capacitor Charger with IGBT Driver and Refresh Package: 10 pin TDFN/MLP (suffix EJ) Typical Applications A8439 ▪ Digital camera flash ▪ Film camera flash ▪ Cell phone flash ▪ Emergency strobe light
Photoflash Capacitor Charger with IGBT Driver and RefreshA8439 2Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com Selection Guide Part Number Package Packing* A8439EEJTR-T 10-pin TDFN/MLP 1500 pieces/ 7-in. reel *Contact Allegro for additional packing options Absolute Maximum Ratings Characteristic Symbol Notes Rating Units SW pin V SW –0.3 to 40 V IGBTDRV pin V IGBTDRV –0.3 to VIN + 0.3 V FB pin V FB –0.3 to VIN V All other pins V X –0.3 to 7 V Operating Ambient Temperature T A Range E –40 to 85 ºC Maximum Junction Temperature T J(max) 150 ºC Storage Temperature T stg –55 to 150 ºC Package Thermal Characteristics Characteristic Symbol Test Conditions* Rating Units Package Thermal Resistance RθJA 4layer PCB, based on JEDEC standard 45 ºC/W *Additional information is available on the Allegro website.
Photoflash Capacitor Charger with IGBT Driver and RefreshA8439 3Allegro MicroSystems, Inc. Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com Functional Block Diagram VIN VIN SW CHARGE GND CMP2 DONE FB Q ILIM Decoder Adjustable Reference IGBTDRV TRIGGER
1.2 V 40 V
Q QSET CLR S R CMP3 CMP1 1.2 V ILIM Comparator DCM Comparator H → L Triggered Timer Control Logic Enable 18 μs Terminal List Table NC FB DONE TRIGGER SW NC IGBTDRV VIN GND CHARGE Device Pin-out Diagram Number Name Function 1,10 NC No connection
2 IGBTDRV IGBT driver gate drive output
3 VIN Power supply input
4 GND Device ground
5 CHARGE Charging enable and ISWLIM code input; set to low to power-off
6 SW Switch, internally connected to the DMOS power FET drain
7 TRIGGER Strobe signal input
8¯ D¯ ¯O¯ ¯N¯ ¯E¯ Open drain, when pulled low by internal MOSFET, indicates that charging target level has been reached
9 FB Output voltage feedback
Photoflash Capacitor Charger with IGBT Driver and RefreshA8439 4Allegro MicroSystems, Inc. Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com ELECTRICAL CHARACTERISTICS Typical values at TA = 25°C and VIN = 3.3 V (unless otherwise noted) Characteristics Symbol Test Conditions Min. Typ. Max. Units Supply Voltage* V IN 3 – 5.5 V Supply Current I IN Charging – 1.5 – mA Charging done / Refresh monitoring – 300 600 μA Shutdown (VCHARGE = 0 V, VTRIGGER = 0 V) – 0.01 1 μA Primary Side Current Limit (ILIM clock input at CHARGE pin) ISWLIM1 1.2 1.4 1.6 A ISWLIM2 – 1.2 – A ISWLIM3 – 1.0 – A ISWLIM4 – 0.86 – A ISWLIM5 – 0.7 – A ISWLIM6 – 0.55 – A ISWLIM7 – 0.4 – A ISWLIM8 – 0.27 – A SW On Resistance R DS(On)SW VIN = 3.3 V, ID = 800 mA, TA = 25°C – 0.27 – Ω SW Leakage Current* I SWLKG VSW = 35 V – – 1 μA SW Maximum Off-Time t OFF(Max) –1 8– μs SW Maximum On-Time t ON(Max) –1 8– μs CHARGE Input Current I CHARGE VCHARGE = VIN ––1 μA CHARGE Input Voltage* VCHARGE(H) 2––V VCHARGE(L) – – 0.8 V ILIM Clock High Time at CHARGE Pin tILIM1(H) Initial pulse 20 – – μs tILIM(H) Subsequent pulses 0.2 – – μs ILIM Clock Low Time at CHARGE Pin tILIM(L) 0.2 – – μs Total ILIM Setup Time t ILIM(SU) –5 4– μs ¯D¯ ¯O¯ ¯N¯ ¯E¯ Output Leakage Current* IDONELKG ––1 μA FB Voltage Threshold* V FB 1.187 1.205 1.223 V FB Input Current I FB VFB = 1.205 V – –120 – nA Auto-Refresh Threshold Level V FBR – 1.07 – V UVLO Enable Threshold V UVLO VIN rising 2.55 2.65 2.75 V UVLO Hysteresis V UVLOHYS – 150 – mV IGBT Driver IGBTDRV On Resistance to VIN R DS(On)I-V VIN = 3.3 V, VIGBTDRV = 1.5 V, VTRIGGER = VIN –5– Ω IGBTDRV On Resistance to GND R DS(On)I-G VIN = 3.3 V, VIGBTDRV = 1.5 V, VTRIGGER = 0 V – 6 – Ω TRIGGER Input Current I TRIGGER VTRIGGER = VIN ––1 μA TRIGGER Input Voltage* VTRIGGER(H) 2––V VTRIGGER(L) – – 0.8 V Propagation Delay, Rising t Dr Rgate=12 Ω, CLOAD = 6500 pF, VIN = 3.3 V – 30 – ns Propagation Delay, Falling t Df Rgate=12 Ω, CLOAD = 6500 pF, VIN = 3.3 V – 30 – ns Output Rise Time t r Rgate=12 Ω, CLOAD = 6500 pF, VIN = 3.3 V – 70 – ns Output Fall Time t f Rgate=12 Ω, CLOAD = 6500 pF, VIN = 3.3 V – 70 – ns *Guaranteed by design and characterization over operating temperature range, –40°C to 85°C.
Photoflash Capacitor Charger with IGBT Driver and RefreshA8439 5Allegro MicroSystems, Inc. Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com Operation Timing Diagram Explanation of Events: A. Start charging by pulling CHARGE to high, provided that V IN is above the VUVLO level. B. Charging stops when V OUT reaches the target voltage. ¯D¯ ¯O¯ ¯N¯ ¯E¯ goes low, to signal the completion of the charging process. C. Start a new charging process with a low-to-high transition at the CHARGE pin. D. Pull CHARGE to low, to put the controller in low-power standby mode. E. Charging does not start, because V IN is below VUVLO level when CHARGE goes high. F. After V IN goes above VUVLO, another low-to-high transition at the CHARGE pin is required to start charging. VOUT CHARGE VIN VUVLO Target VOUT TRIGGER IGBTDRV SW AB CD E F DONE
Photoflash Capacitor Charger with IGBT Driver and RefreshA8439 6Allegro MicroSystems, Inc. Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com Performance Characteristics Tests performed using application circuit shown in figure 8 with ISWLIM set to 1.4A (Single rising edge on CHARGE pin), unless otherwise noted Charging Waveforms Symbol Parameter Units/Division C1 V OUT 50 V C4 I BATT(Avg) 200 mA t time 1 s Conditions Parameter Value VBATT 2.5 V VBIAS 3.3 V COUT 100 μF Symbol Parameter Units/Division C1 V OUT 50 V C4 I BATT(Avg) 200 mA t time 1 s Conditions Parameter Value VBATT 3.6 V VBIAS 3.3 V COUT 100 μF Symbol Parameter Units/Division C1 V OUT 50 V C4 I BATT(Avg) 200 mA t time 1 s Conditions Parameter Value VBATT 4.2 V VBIAS 3.3 V COUT 100 μF t IBATT VOUT t IBATT VOUT t IBATT VOUT
Photoflash Capacitor Charger with IGBT Driver and RefreshA8439 7Allegro MicroSystems, Inc. Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com VOUT (V) Efficiency (%) VBATT (V) Charge Time (s) 100 150 200 250 300 350 VOUT = 300 V VOUT = 320 V 5.5 6.0 VBATT = 4.2 V VBATT = 5.0 V VBATT = 3.0 V 2 2.5 3 3.5 4 4.5 5 5.5 6 VBATT (V) Charge Time (s)VOUT = 300 V VOUT = 320 V Charge Time VBIAS = 3.3 V, COUT = 100 μF Connect VBATT to a separate power supply Efficiency VBATT = VBIAS , TA = 25°C Typical Switching Waveform Performance Characteristics, continued Tests performed using application circuit shown in figure 8 with ISWLIM set to 1.4A (Single rising edge on CHARGE pin), unless otherwise noted IGBTDRV TRIGGER tDr tr tDf tf 50% 10% 90% 50% 10% 90% IGBT Drive Timing Definition Symbol Parameter Units/Division C1 V OUT 50 V C2 V SW 10 V C3 V BATT 5 V C4 I Primary 500 mA t time 2 μs Conditions Parameter Value VOUT 300 V VBATT VIN t VBATT VOUT VSW IPrimary
Photoflash Capacitor Charger with IGBT Driver and RefreshA8439 8Allegro MicroSystems, Inc. Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com Rising Signal IGBT Drive Performance Symbol Parameter Units/Division C2 V IGBTDRV 1 V C3 V TRIGGER 1 V t time 50 ns Conditions Parameter Value tDr 22.881 ns tr 63.125 ns CLOAD 6800 pF Rgate 12 Ω t VIGBTDRV VTRIGGER Falling Signal Symbol Parameter Units/Division C2 V IGBTDRV 1 V C3 V TRIGGER 1 V t time 50 ns Conditions Parameter Value tDf 27.427 ns tf 65.529 ns CLOAD 6800 pF Rgate 12 Ω tr VIGBTDRV VTRIGGER t tf Performance Characteristics, continued IGBT Drive waveforms are measured with R-C load (12 Ω, 6800 pF)
OUT, from the secondary winding. resistor network. The operation is shown in figure 3. lower current limit at low battery voltages. Figure 3. Auto-refresh waveform of A8439.
10Allegro MicroSystems, Inc. limit can be set by sending a burst of pulses to the CHARGE pin. examples of the pulse streams and the resulting current levels. Figure 4. ILIM Clock Timing Definition
11Allegro MicroSystems, Inc. forced low before charging has been completed. The A8439 implements an adaptive off-time, tOFF , control. 1.2 V , the switch is turned on again for the next charging cycle. maximum switch off-time to 20 μs. Figure 7. Last charging cycle, when the CHARGE pin is forced low before
12Allegro MicroSystems, Inc. OUT is 320 V , then the turns ratio should be at least 8.9. the worst case condition, N can be determined to be 9.5. example, a minimum turns ratio of N = 10 is recommended. Components for more information. Figure 8. Typical circuit for photoflash capacitor charging application.
Photoflash Capacitor Charger with IGBT Driver and RefreshA8439 13Allegro MicroSystems, Inc. Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com Adjusting Output Voltage The A8439 senses output voltage continuously in order to provide auto-refresh function. The output voltage can be adjusted by selecting proper values of the voltage divider resistors. Use the following equation to calculate values for Rx (Ω): 21 −=+ FBV VOUT R RR 1 . (3) R1 and R2 together need to have a breakdown voltage of at least 300 V . A typical 1206 surface mount resistor has a 150 V breakdown voltage rating. It is recommended that R1 and R2 have similar values to ensure an even voltage stress between them. Recommended values are: R1 = R2 = 4.99 M Ω (1206) R3 = 39.4 k Ω (0603) which together yield a stop voltage of 305 V . Output Diode Selection Choose the rectifying diode(s), D1, to have small parasitic capacitance (short reverse recovery time) while satisfying the reverse voltage and forward current requirements. The peak reverse voltage of the diode, V D_Peak , occurs when the internal MOSFET switch is closed, and the primary-side current starts to ramp-up. It can be calculated as: BATT .VNVOUTD_PeakV ×+= (4) The peak current of the rectifying diode, ID_Peak, is calculated as: .IPrimary_PeakD_PeakI = N/ (5) Input Capacitor Selection Ceramic capacitors with X5R or X7R dielectrics are recom- mended for the input capacitor, C2. It should be rated at least 4.7 μF / 6.3 V to decouple the battery input, V BATT , at the primary of the transformer. When using a separate bias, VBIAS , for the A8439 VIN supply, connect at least a 0.1 μF / 6.3 V bypass capacitor to the VIN pin. Layout Guidelines Key to a good layout for the photoflash capacitor charger circuit is to keep the parasitics minimized on the power switch loop (transformer primary side) and the rectifier loop (secondary side). Use short, thick traces for connections to the transformer primary and SW pin. Output voltage sensing circuit elements must be kept away from switching nodes such as SW pin. It is important that the signal trace and other signal traces be routed away from the transformer and other switching traces, in order to minimize noise pickup. In addition, high voltage isolation rules must be followed carefully to avoid breakdown failure of the circuit board. Recommended Components Table Component Rating Part Number Source C1, Input Capacitor 0.1 μF, ±10%, 16 V X7R ceramic capacitor (0603) GRM188R71C104KA01D Murata C2, Input Capacitor 4.7 μF, ±10%, 10 V, X5R ceramic capacitor (0805) LMK212BJ475KG Taiyo Yuden COUT, Photoflash Capacitor 330 V 100 μF (or 19 to 180 μF) EPH-331ELL101B131S Chemi-Con D1, Output Diode 2 x 250 V, 225 mA, 5 pF BAV23S Philips Semiconductor, Fairchild Semiconductor R1, R2, FB Resistors 4.99 M Ω, 1/4 W ±1% (1206) 9C12063A4994FKHFT Yageo R3, FB Resistor 39.0 k Ω 1/10 W ±1% (0603) 9C06031A3902FKHFT Yageo T1, Transformer 1:10.2, LPrimary = 14.5 μH LDT565630T-002 TDK 1:10.2, LPrimary = 12 μH T-16-024A Tokyo Coil Engineering 1:10, LPrimary = 10.8 μH ST-532517A Asatech
Photoflash Capacitor Charger with IGBT Driver and RefreshA8439 14Allegro MicroSystems, Inc. Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com Package EJ, 10-Contact TDFN/MLP 1.65 NOM .065 2.39 NOM .094 0.30 0.18 .012 .007 0.50 0.30 .020 .012 1.65 NOM .065 3.10 NOM .122 0.30 NOM .012 0.50 NOM .020 0.85 NOM .033 2.39 NOM .094 0.80 0.70 .031 .028 0.05 0.00 .002 .000 3.15 2.85 .124 .112 3.15 2.85 .124 .112 0.20 REF .008 A B CSEATING PLANEC0.08 [.003] 10X 0.50 .020 10X 0.10 [.004] M C A B 0.05 [.002] M C A A Terminal #1 mark area B Exposed thermal pad (reference dimensions only, terminal #1 identifier appearance at supplier discretion) Preliminary dimensions, for reference only (reference JEDEC MO-229 WEED) Dimensions in millimeters U.S. Customary dimensions (in.) in brackets, for reference only Dimensions exclusive of mold flash, gate burrs, and dambar protrusions Exact case and lead configuration at supplier discretion within limits shown C C Reference pad layout (reference IPC7351 SON50P300X300X80-11WEED2M); adjust as necessary to meet application process requirements B R0.20 REF .008 8X 0.20 MIN .008 8X 0.20 MIN .008 Allegro MicroSystems, Inc. reserves the right to make, from time to time, such de par tures from the detailed spec i fi ca tions as may be required to permit improvements in the per for mance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the information being relied upon is current. Allegro products are not authorized for use as critical components in life-support devices or sys tems without express written approval. The in for ma tion in clud ed herein is believed to be ac cu rate and reliable. How ev er, Allegro MicroSystems, Inc. assumes no re spon si bil i ty for its use; nor for any in fringe ment of patents or other rights of third parties which may result from its use. Copyright©2005, 2006 AllegroMicrosystems, Inc.