A6250

A6250 EMMICRO

Document overview

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Technical content

Features

n Highly accurate 5 V, 250 mA guaranteed output n Low dropout voltage, typically 260 mV at 250 mA n Low quiescent current, typically 175 µA n Standby mode, maximum current 340 µA (with 100 µA load on OUTPUT) n Unregulated DC input can withstand -20 V reverse battery and +60 V power transients n Fully operational for unregulated DC input voltage up to 40 V and regulated output voltage down to 3.0 V n Reset output guaranteed for regulated output voltage down to 1.2 V n No reverse output current n Very low temperature coefficient for the regulated output n Current limiting n Comparator for voltage monitoring, voltage reference 1.52 V n Programmable reset voltage monitoring n Programmable power on reset (POR) delay n Watchdog with programmable time windows guarantees a minimum time and a maximum time between software clearing of the watchdog n Time base accuracy ±10% n System enable output offers added security n TTL/CMOS compatible n -40 to +125°C temperature range n PSOP2-16 package

Description

The A6250 of fers a high level of in te gra tion by com bin ing volt age reg u la tion, volt age mon i tor ing and soft ware mon i - tor ing in a 16 lead pack age. The volt age reg u la tor has a low drop out volt age (typ. 260 mV at 250 mA) and a low qui es cent cur rent (175 µA). The qui es cent cur rent in - creases only slightly in drop out pro long ing bat tery life. Built-in pro tec tion in cludes a pos i tive tran sient ab sorber for up to 60 V (load dump) and the abil ity to sur vive an un - reg u lated in put volt age of -20 V (re verse bat tery). The in - put may be con nected to ground or a re verse volt age with out re verse cur rent flow from the out put to the in put. A com para tor mon i tors the volt age ap plied at the VIN in put com par ing it with an in ter nal 1.52 V ref er ence. The power-on re set func tion is in i tial ized af ter VIN reaches 1.52 V and takes the re set out put in ac tive af ter TPOR de pend ing of ex ter nal re sis tance. The re set out put goes ac tive low when the VIN volt age is less than 1.52 V. The RES and EN out puts are guar an teed to be in a cor rect state for a reg u - lated out put volt age as low as 1.2 V. The watch dog func - tion mon i tors soft ware cy cle time and ex e cu tion. If soft ware clears the watch dog too quickly (in cor rect cy cle time) or too slowly (in cor rect ex e cu tion) it will cause the sys tem to be re set. The sys tem en able out put pre vents crit i cal con trol func tions be ing ac ti vated un til soft ware has suc cess fully cleared the watch dog three times. Such a se - cu rity could be used to pre vent mo tor con trols be ing en er - gized on re peated re sets of a faulty sys tem.

Applications

n Battery powered products n High efficiency linear power supplies n Automotive electronics A6250EM MICROELECTRONIC-MARIN SA Typical Operating Configuration Pin Assignment Fig. 1 Fig. 2 A6250 A6250

Parameter Symbol Conditions Continuous voltage at INPUT to VSS VINPUT -0.3 to +45 V Transients on INPUT for t< 100 ms and duty cycle 1% VTRANS up to +60 V Reverse supply voltage on INPUT VREV -20 V Max. voltage at any signal pin VMAX OUTPUT+0.3V Min. voltage at any signal pin VMIN VSS -0.3V Storage temperature TSTO -65 to +150°C Operating junction temperature TJ max. 150 °C Electrostatic discharge max. To MIL-STD-883C method 3015 VSmax 1000V Max. soldering conditions TSmax 250°C x 10 s Max. Output current IOUTPUTmax 300 mA Ta ble 1 Stresses above these listed max i mum rat ings may cause per ma nent dam age to the de vice. Ex po sure be yond spec i fied op er at ing con di tions may af fect de vice re li abil ity or cause mal func tion. Decoupling Methods The in put ca pac i tor is nec es sary to com pen sate the line in flu ences. A re sis tor of approx. 1 Ω con nected in se ries with the in put ca pac i tor may be used to damp the os cil la - tion of the in put ca pac i tor and in put in duc tivi ty. The ESR value of the ca pac i tor plays a ma jor role re gard ing the ef fi - ciency of the de coup ling. It is rec om mended also to con - nect a ce ramic ca pac i tor (100 nF) di rectly at the IC’s pins. In gen eral the user must as sure that pulses on the in put line have slew rates lower than 1 V/µs. On the out put side, the ca pac i tor is nec es sary for the sta bil ity of the reg u la tion cir cuit. The sta bil ity is guar an teed for val ues of 22 µF or big ger. It is spe cially im por tant to choose a ca pac i tor with a low ESR value. Tantal ca pac i tors are rec om mended. See the notes re lated to Ta ble 2. Spe cial care must be taken in dis turbed en vi ron ments (au to mo tive, prox im ity of mo tors and re lays, etc.). Handling Procedures This de vice has built-in pro tec tion against high static volt - ages or elec tric fields; how ever, anti-static pre cau tions must be taken as for any other CMOS com po nent. Un less oth er wise spec i fied, proper op er a tion can only oc cur when all ter mi nal volt ages are kept within the sup ply volt - age range. Un used in puts must al ways be tied to a de - fined logic volt age level. Operating Conditions Parameter Symbol Min. Max. Units Operating junction temperature1) TJ -40 +125 °C INPUT voltage 2) VINPUT 2.3 40 V OUTPUT voltage 2) 3) VOUTPUT 1.2 V RES & EN guaranteed 4) VOUTPUT 1.2 V OUTPUT current 5) IOUTPUT 250 mA Comparator input voltage VIN 0 VOUTPUT V RC-oscillator programming 6) R 10 1000 kΩ Thermal resistance from junction to ambient 7) - PSOP2-16 Rth(j-a) 30 90 °C/W Ta ble 21) The max i mum op er at ing tem per a ture is con firmed by sam pling at ini tial de vice qual i fi ca tion. In pro duc tion, all de vices are tested at +125°C. 2) Full op er a tion guar an teed. To achieve the load reg u la tion spec i fied in Ta ble 3 a 22 µF ca pac i tor or greater is re quired on the INPUT, see Fig. 8. The 22 µF must have an ef fec tive re sis tance ≤ 5 Ω and a res o nant fre quency above 500 kHz.3) A 10 µF load ca pac i tor and a 100 nF de coup ling ca pac i tor are re quired on the reg u la tor OUTPUT for sta bil ity. The 10 µF must have an ef fec tive se ries re sis tance of ≤ 5 Ω and a res o nant fre quency above 500 kHz.4) RES must be pulled up ex ter nally to VOUTPUT even if it is un used. (Note: RES and EN are used as in puts by EM test.)5) The OUTPUT cur rent will not ap ply for all pos si ble com bi na tions of in put volt age and out put cur rent. Com bi na tions that would re quire the A6250 to work above the max i mum junc tion tem per a ture (+125 °C) must be avoided.6) Re sis tor val ues close to 1000 kΩ are not rec om mended for ap pli ca tions work ing at 125 °C.7) The ther mal re sis tance spec i fied as sumes the pack age is sol dered to a PCB. The termal re sis tance’s value de pends on the PCB’s struc ture. A typical value of 51 °C/W has been ob tained with a dual layer board, with the slug soldered to the heat-sink area of the PCB (see Fig. 22). A6250

Electrical CharacteristicsVINPUT = 6.0 V, CL = 10 µF + 100 nF, CINPUT = 22 µF, TJ = -40 to +125°C, un less oth er wise spec i fied Parameter Symbol Test Conditions Min. Typ. Max. Unit Supply current in standby mode ISS REXT = don’t care, TCL = VOUTPUT, VIN = 0 V, IL = 100 µA 140 340 µA Supply current 1) ISS REXT = 100 kΩ , I/Ps at VOUTPUT, O/Ps 1 MΩ to VOUTPUT, IL = 100 µA 175 400 µA Supply current 1) ISS REXT = 100 kΩ, I/Ps at VOUTPUT, VINPUT = 8.0 V, O/Ps 1MΩ to VOUTPUT, IL = 100 mA 1.7 4.2 mA IL = 250 mA 7 15 mA Output voltage VOUTPUT IL = 100 µA 4.85 5.15 V Output voltage VOUTPUT 100 µA ≤ IL ≤ 250 mA, 4.85 5.15 V Output voltage temperature coefficient 2) Vth(coeff) 100 ppm/°C Line regulation 3) VLINE 6 V ≤ VINPUT ≤ 35 V, ΙL = 1 mA, Load regulation 3) VL 100 µA ≤ IL ≤ 100 mA 0.2 0.7 % Load regulation 3) VL 5 mA ≤ IL ≤ 250 mA 0.9 1.45 % Dropout voltage 4) VDROPOUT IL = 100 µA 40 170 mV Dropout voltage 4) VDROPOUT IL = 100 mA 160 3805) mV Dropout voltage 4) VDROPOUT IL = 250 mA 260 650 mV Dropout supply current ISS VINPUT = 4.5 V, IL = 100 µA, REXT = 100 kΩ , O/Ps 1 MΩ to VOUTPUT, I/Ps at VOUTPUT 1.2 1.8 mA Current limit ILmax OUTPUT tied to VSS 450 mA OUTPUT noise, 10 Hz to 100 kHz VNOISE 200 µV rms 4.5 ≤ VOUTPUT ≤ 5.5 V, IL = 100 µA. CL = 10 µF + 100 nF, CINPUT = 22 µF, TJ = -40 to +125°C, un less oth er wise spec i fied RES and EN Output Low Voltage VOL VOUTPUT = 4.5 V, IOL = 20 mA 0.4 V VOL VOUTPUT = 4.5 V, IOL = 8 mA 0.2 0.4 V VOL VOUTPUT = 2.0 V, IOL = 4 mA 0.2 0.4 V VOL VOUTPUT = 1.2 V, IOL = 0.5 mA 0.06 0.2 V EN Output High Voltage VOH VOUTPUT = 4.5 V, IOH = -1 mA 3.5 4.1 V VOH VOUTPUT = 2.0 V, IOH = -100 µA 1.8 1.9 V VOH VOUTPUT = 1.2 V, IOH = -30 µA 1.0 1.1 V TCL and VIN TCL Input Low Level VIL VSS 0.8 V TCL Input High Level VIH 2.0 VOUTPUT V Leakage current TCL input ILI VSS ≤ VTCL ≤ VOUTPUT 0.05 1 µA VIN input resistance RVIN 100 MΩ Comparator reference 6) 7) VREF TJ = +25°C 1.474 1.52 1.566 V VREF 1.436 1.620 V VREF -40°C ≤ TJ ≤ +125°C 1.420 1.620 V Comparator hysteresis 7) VHY 2 mV Ta ble 31) If INPUT is con nected to VSS, no re verse cur rent will flow from the OUTPUT to the INPUT, how ever the sup ply cur rent spec i fied will be sank by the OUTPUT to supply the A6250.2) The OUTPUT volt age tem per a ture co ef fi cient is defined as the worst case voltage change divided by the total temperature range.3) Reg u la tion is mea sured at con stant junc tion tem per a ture using pulse testing with a low duty cycle. Changes in OUTPUT volt age volt age plus the comparator hysteresis (see Fig. 4).

Timing CharacteristicsVINPUT = 6.0 V, IL = 100 µA, CL = 10 µF + 100 nF, CINPUT = 22 µF, TJ = -40 to +125°C, un less oth er wise spec i fied Parameter Symbol Test Conditions Min. Typ. Max. Units Propagation delays: TCL to Output Pins TDIDO 250 500 ns VIN sensitivity TSEN 1 5 20 µs Logic Transition Times on all Output Pins TTR Load 10 kΩ , 50 pF 30 100 ns Power-on Reset delay TPOR REXT = 123 kΩ , ± 1% 90 100 110 ms Watchdog Time TWD REXT = 123 kΩ , ± 1% 90 100 110 ms Open Window Percentage OWP ±0.2 TWD Closed Window Time TCW 0.8 TWD TCW REXT = 123 kΩ , ± 1% 72 80 88 ms Open Window Time TOW 0.4 TWD TOW REXT = 123 kΩ , ± 1% 36 40 44 ms Watchdog Reset Pulse TWDR TWD / 40 TWDR REXT = 123 kΩ , ± 1% 2.5 ms TCL Input Pulse Width TTCL 150 ns Ta ble 4 Timing Waveforms Watchdog Timeout Period Voltage Monitoring Fig. 3 Fig. 4 Con di tion: REXT = 123 kΩ

Combined Voltage and Timer Reaction Block Diagram Fig. 5 Fig. 6 Fig. 7

2 EN Push-pull active low enable output

3 RES Open drain active low reset output. RES must be pulled up to VOUTPUT even if unused

4 TCL Watchdog timer clear input signal

5 VSS GND terminal

12 INPUT Voltage regulator input

13 OUTPUT Voltage regulator output

14 R REXT input for RC oscillator tuning

15 VIN Voltage comparator input

The A6250 has a 5 V ± 3%, 250 mA, low drop out volt age reg u la tor. The low sup ply cur rent (typ. 175 µA) makes the A6250 par tic u larly suited to au to mo tive sys tems then re - main en er gized 24 hours a day. The in put volt age range is

2.3 V to 40 V for op er a tion and the in put pro tec tion in -

cludes both re verse bat tery (20 V be low ground) and load dump (pos i tive tran sients up to 60 V). There is no re verse cur rent flow from the OUTPUT to the INPUT when the INPUT equals V SS. This fea ture is im por tant for sys tems which need to im ple ment (with ca pac i tance) a min i mum power sup ply hold-up time in the event of power fail ure. To achieve good load reg u la tion a 22 µF ca pac i tor (or greater) is needed on the INPUT (see Fig. 8). Tan ta lum or alu minium electrolytics are ad e quate for the 22 µF ca pac i - tor; film types will work but are rel a tively ex pen sive. Many alu minium electrolytics have elec tro lytes that freeze at about -30°C, so tantalums are rec om mended for op er a - tion be low -25°C. The im por tant pa ram e ters of the 22 µF ca pac i tor are an ef fec tive se ries resistance of ≤ 5 Ω and a res o nant fre quency above 500 kHz. A 10 µF ca pac i tor (or greater) and a 100 nF ca pac i tor are re quired on the OUTPUT to pre vent os cil la tions due to in - sta bil ity. The spec i fi ca tion of the 10 µF ca pac i tor is as per the 22 µF ca pac i tor on the INPUT (see pre vi ous para - graph). The A6250 will re main sta ble and in reg u la tion with no ex - ter nal load and the drop out volt age is typ i cally con stant as the in put volt age fall to be low its min i mum level (see Ta ble 2). These fea tures are es pe cially im por tant in CMOS RAM keep-alive ap pli ca tions. Care must be taken not to ex ceed the max i mum junc tion tem per a ture (+125°C). The power dis si pa tion within the A6250 is given by the for mula: PTOTAL = (VINPUT - VOUTPUT) . IOUTPUT + (VINPUT) . ISS The max i mum con tin u ous power dis si pa tion at a given tem per a ture can be cal cu lated us ing the for mula: PMAX = (125°C - TA) / Rth(j-a) where Rth(j-a) is the ther mal re sis tance from the junc tion to the am bi ent and is spec i fied in Ta ble 2. Note the Rth(j-a) given in Ta ble 2 as sumes that the pack age is sol dered to a PCB. The above for mula for max i mum power dis si pa tion as sumes a con stant load (ie. ≥ 100 s). The tran sient ther - mal re sis tance for a sin gle pulse is much lower than the con tin u ous value. VIN Monitoring The power-on re set and the power-down re set are gen er - ated as a re sponse to the ex ter nal volt age level on the VIN in put. The ex ter nal volt age level is typ i cally ob tained from a volt age di vider as shown in Fig. 8. The user uses the ex - ter nal volt age di vider to set the de sired thresh old level for power-on re set and power-down re set in his sys tem. The in ter nal com para tor ref er ence volt age is typ i cally 1.52 V. At power-up the re set out put (RES ) is held low (see Fig. 4). Af ter INPUT reaches 3.36 V (and so OUTPUT reaches at least 3 V) and VIN be comes greater than VREF, the RES out - put is held low for an ad di tional power-on-reset (POR) de - lay which is equal to the watch dog time TWD (typ i cally 100 ms with an ex ter nal re sis tor of 123 kΩ con nected at R pin). The POR de lay pre vents re peated tog gling of RES even if VIN and the INPUT volt age drops out and re cov ers. The POR de lay al lows the mi cro pro ces sor’s crys tal os cil la tor time to start and sta bi lize and en sures cor rect rec og ni tion of the re set sig nal to the mi cro pro ces sor. The RES out put goes ac tive low gen er at ing the power-down re set when ever VIN falls be low VREF. The sen - si tiv ity or re ac tion time of the in ter nal com para tor to the volt age level on VIN is typ i cally 5 µs. Timer Programming The on-chip os cil la tor with an ex ter nal re sis tor REXT con - nected be tween the R pin and VSS (see Fig. 8) al lows the user to ad just the power-on re set (POR) de lay, watch dog time TWD and with this also the closed and open time win - dows as well as the watch dog re set pulse width (TWD / 40). With REXT = 123 kΩ typ i cal val ues are: - Power-on re set de lay: TPOR = 100 ms - Watchdog time: TWD = 100 ms - Closed window: TCW = 80 ms - Open window: TOW = 40 ms - Watchdog reset: TWDR = 2.5 ms Note the cur rent con sump tion in creases as the fre quency in creases.

Watchdog Timeout Period Description The watch dog time out pe riod is di vided into two parts, a “closed" win dow and an “open" win dow (see Fig. 3) and is de fined by two pa ram e ters, TWD and the Open Win dow Per cent age (OWP).The closed win dow starts just af ter the watch dog timer re sets and is de fined by T CW = T WD - OWP(TWD).The open win dow starts af ter the closed time win dow fin ishes and lasts till TWD + OWP(TWD). The open win dow time is de fined by TOW = 2 x OWP(TWD). For ex am ple if TWD = 100 ms (ac tual value) and OWP = ± 20% this means the closed win dow lasts dur ing first the 80 ms (T CW = 80 ms = 100 ms - 0.2 (100 ms)) and the open win dow the next 40 ms (TOW = 2 x 0.2 (100 ms) = 40 ms). The watch dog can be ser viced be tween 80 ms and 120 ms af ter the timer re set. How ever as the time base is ±10% ac cu rate, soft ware must use the fol low ing cal cu la - tion for ser vic ing sig nal TCL dur ing the open win dow: Re lated to curves (Fig. 10 to Fig. 20), es pe cially Fig. 19 and Fig. 20, the re la tion be tween TWD and REXT could eas ily be de fined. Let us take an ex am ple de scrib ing the vari a - tions due to pro duc tion and tem per a ture: 1. Choice, TWD = 26 ms. 2. Re lated to Fig. 20, the co ef fi cient (TWD to REXT) is 1.125 where REXT is in kΩ and TWD in ms. 4. The ra tio be tween TWD = 26 ms and the (TCL pe riod) = 25.4 ms is 0.975. Then the re la tion over the Pro duc tion and the full tem per a ture range is, TCL pe riod = 0.975 x TWD 0.975 x REXT or TCL pe riod = 0.975 x REXT 1.155 , as typ i cal value. a) ±10 % while PRODUCTION value unknown for the cus tomer when REXT ≠ 123 kΩ . b) ±5 % while op er at ing TEMPERATURE range 5. If you fixed a TCL pe riod = 26 ms ⇒ REXT 26 x 1.155 0.975 = 30.8 kΩ. If dur ing your pro duc tion the TWD time can be mea sured at TJ = +25°C and the µC can ad just the TCL pe riod, then the TCL pe riod range will be much larger for the full op er at ing tem per a ture. TWD versus VOUTPUT at TJ = +25 °C TWD versus R at TJ = +25 °C Fig. 8 Fig. 9

TWD versus R at TJ = +25 °C R [kΩ ] Fig. 10

TWD versus VOUTPUT atTJ = +85 °C TWD versus VOUTPUT at TJ = -40 °C TWD versus R at TJ = -40°C Fig. 11 TWD versus R at TJ = +85 °C Fig. 12 Fig. 13 Fig. 14

TWD versus Temperature at 5 V TWD versus R at 5 V Fig. 15 Fig. 16 Maximum OUTPUT Current versus INPUT Voltage Fig. 17

Timer Clearing and RES Action The watch dog cir cuit mon i tors the ac tiv ity of the pro ces - sor. If the user’s soft ware does not send a pulse to the TCL in put within the pro grammed open win dow time out pe riod a short watch dog RES pulse is gen er ated which is equal to TWD / 40 = 2.5 ms typ i cally (see Fig. 5). With the open win dow con straint new se cu rity is added to con ven tional watch dogs by mon i tor ing both soft ware cy cle time and ex e cu tion. Should soft ware clear the watch dog too quickly (in cor rect cy cle time) or too slowly (in cor rect ex e - cu tion) it will cause the sys tem to be re set. If soft ware is stuck in a loop which in cludes the rou tine to clear the watch dog then a con ven tional watch dog would not make a sys tem re set even though soft ware is mal func tion ing; the A6250 would make a sys tem re set be cause the watch - dog would be cleared too quickly. If no TCL sig nal is ap - plied be fore the closed and open win dows ex pire, RES will start to gen er ate square waves of pe riod (TCW + TOW + TWDR). The watch dog will re main in this state un til the next TCL fall ing edge ap pears dur ing an open win dow, or un til a fresh power-up se quence. The sys tem en able out put, EN, can be used to pre vent crit i cal con trol func tions be ing ac ti vated in the event of the sys tem go ing into this fail ure mode (see sec tion “En able - EN Out put"). The RES out put must be pulled up to VOUTPUT even if the out put is not used by the sys tem (see Fig. 8). Com bined Voltage and Timer Action The com bi na tion of volt age and timer ac tions is il lus trated by the se quence of events shown in Fig. 6. On power-up, when the volt age at VIN reaches VREF, the power-on-reset, POR, de lay is in i tial ized and holds RES ac tive for the time of the POR de lay. A TCL pulse will have no ef fect un til this power-on-reset de lay is com pleted. Af ter the POR de lay has elapsed, RES goes in ac tive and the watch dog timer starts act ing. If no TCL pulse oc curs, RES goes ac tive low for a short time TWDR af ter each closed and open win dow pe riod. A TCL pulse com ing dur ing the open win dow clears the watch dog timer. When the TCL pulse oc curs too early (dur ing the closed win dow), RES goes ac tive and a new time out se quence starts. A volt age drop be low the VREF level for lon ger than typ i cally 5 µs over rides the timer and im me di ately forces RES ac tive and EN in ac tive. Any fur ther TCL pulse has no ef fect un til the next power-up se quence has com pleted. Enable - EN Output The sys tem en able out put, EN, is in ac tive al ways when RES is ac tive and re mains in ac tive af ter a RES pulse un til the watch dog is ser viced cor rectly 3 con sec u tive times (ie. the TCL pulse must come in the open win dow). Af ter three con sec u tive ser vices of the watch dog with TCL dur - ing the open win dow, the EN goes ac tive low. A mal func - tion ing sys tem would be re peat edly re set by the watch dog. In a con ven tional sys tem crit i cal mo tor con - trols could be en er gized each time re set goes in ac tive (time al lowed for the sys tem to re start) and in this way the elec tri cal mo tors driven by the sys tem could func tion out of con trol. The A6250 pre vents the above fail ure mode by us ing the EN out put to dis able the mo tor con trols un til soft ware has suc cess fully cleared the watch dog three times (ie. the sys tem has cor rectly re started af ter a re set con di tion). Typical Application A6250 Fig. 18

TWD Coefficient versus REXT at TJ = +25 °C REXT Coefficient versus TWD at TJ = +25 °C Fig. 19 Fig. 20

Package and Ordering Information Dimensions of PSOP2-16 Package Dimensions in mm Fig. 21

Ordering Information

The A6250 is avail able in the fol low ing pack age: Type Pack age A6250 X 16W PSOP2-16 When or der ing please spec ify com plete part num ber.EM MICROELECTRONIC-MARIN SA, CH-2074 Marin, Switzerland, Tel. 032 - 755 51 11, Fax 032 - 755 54 03 EM Mi cro elec tronic-Marin SA can not as sume re spon si bil ity for use of any cir cuitry de scribed other than cir cuitry en tirely em bod ied in an EM Mi cro elec tronic-Marin SA prod uct. EM Mi cro elec tronic-Marin SA re serves the right to change the cir cuitry and spec i fi ca tions with out no tice at any time. You are strongly urged to en sure that the in for ma tion given has not been su per seded by a more up-to-date ver sion. E. & O.E. Printed in Switzerland, Th © 2000 EM Microelectronic-Marin SA, 10/2000, Rev. B/335 Dual Layer PCB Fig. 22Dimensions in mm