A3282LUA-T

A3282_06 ALLEGRO

Document overview

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Technical content

<1Ω Dynamic Offset Cancellation Sample and Hold To All Subcircuits Amp Low-Pass Filter

Description

The A3282 Hall-effect sensor is a temperature stable, stress- resistant latch. Superior high-temperature performance is made possible through an Allegro ® patented dynamic offset cancellation that utilizes chopper-stabilization. This method reduces the offset voltage normally caused by device overmolding, temperature dependencies, and thermal stress. The A3282 complements the current Allegro family of chopper- stabilized latching sensors. The A3282 includes the following on a single silicon chip: voltage regulator, Hall-voltage generator, small-signal amplifier, chopper stabilization, Schmitt trigger, and a short circuit protected open-drain output. Advanced BiCMOS wafer fabrication processing is used to take advantage of low-voltage requirements, component matching, very low input-offset errors, and small component geometries. This device requires the presence of both south and north polarity magnetic fields for operation. In the presence of a south polarity field of sufficient strength, the device output latches on, and only switches off when a north polarity field of sufficient strength is present. A3282-DS, Rev. 3 Features and Benefits ▪ Chopper stabilization ▫ Superior temperature stability ▫ Extremely low switchpoint drift ▫ Insensitive to physical stress ▪ Reverse battery protection ▪ Output short circuit protection ▪ Solid state reliability ▪ Small size ▪ Robust EMC capability ▪ High ESD ratings (HBM) Chopper-Stabilized Hall-Effect Latch Continued on the next page… Functional Block Diagram Not to scale 3 pin SIP (suffix UA) A3282

Chopper-Stabilized Hall Effect LatchA3282 2Allegro MicroSystems, Inc.

115 Northeast Cutoff, Box 15036

Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com Selection Guide Part Number Pb-free 1 Packing2 Mounting Ambient, TA (°C) BRP(MIN) (G) BOP(MAX) (G) A3282ELHLT-T Yes 7-in. reel, 3000 pieces/reel 3-pin SOT23W surface mount –40 to 85 –150 150A3282EUA-T Yes Bulk, 500 pieces/bag 3-pin SIP through hole A3282LLHLT-T Yes 7-in. reel, 3000 pieces/reel 3-pin SOT23W surface mount –40 to 150A3282LUA-T Yes Bulk, 500 pieces/bag 3-pin SIP through hole 1Pb-based variants are being phased out of the product line. a. Certain variants cited in this footnote are in production but have been determined to be LAST TIME BUY. This classification indicates that sale of this device is currently restricted to existing customer applications. The device should not be purchased for new design applications because obsolescence in the near future is probable. Samples are no longer available. Status change: October 31, 2006. Deadline for receipt of LAST TIME BUY ORDERS: April 27, 2007. These variants include: A3282ELHLT, A3282EUA, A3282LLHLT. b. Certain variants cited in this footnote are in production but have been determined to be NOT FOR NEW DESIGN. This classifi cation indicates that sale of this device is currently restricted to existing customer applications. The variants should not be purchased for new design applications because obsolescence in the near future is probable. Samples are no longer available. Status change: May 1, 2006. These variants include: A3282LUA. 2Contact Allegro for additional packing options. The A3282 is rated for operation between the ambient temperatures –40°C and 85°C for the E temperature range, and –40°C to 150°C for the L temperature range. The two package styles available provide magnetically optimized solutions for most applications. Package LH is an SOT23-W, a miniature low-profile surface-mount package, while package UA is a three-lead ultramini SIP for through-hole mounting. Each package is available in a lead (Pb) free version, with 100% matte tin plated leadframes. Description (continued) Absolute Maximum Ratings Characteristic Symbol Notes Rating Units Supply Voltage V CC 28 V Reverse-Supply Voltage V RCC –18 V Output Off Voltage V OUT 28 V Output Current I OUTSINK Internally Limited – Reverse-Output Current I ROUT –10 mA Magnetic Flux Density B Unlimited G Operating Ambient Temperature T A Range E –40 to 85 ºC Range L –40 to 150 ºC Maximum Junction Temperature T J(max) 165 ºC Storage Temperature T stg –65 to 170 ºC

Chopper-Stabilized Hall Effect LatchA3282 3Allegro MicroSystems, Inc. Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com OPERATING CHARACTERISTICS valid over full operating voltage and ambient temperature ranges, unless otherwise noted Characteristic Symbol Test Conditions Min. Typ. Max. Units

Electrical Characteristics

1 VCC Operating, TJ < 165°C 3.6 – 24 V Output Leakage Current I OUTOFF VOUT = 24 V, B < BRP –– 1 0 μA Output On Voltage V OUT(SAT) IOUT = 20 mA, B > BOP – 250 500 mV Output Current Limit I OM B > BOP 30 – 60 mA Power-On Time t PO VCC > 3.6 V – 8 50 μs Chopping Frequency f c – 200 – kHz Output Rise Time2 tr RLOAD = 820 Ω, CS = 20 pF – 0.2 1 μs Output Fall Time2 tf RLOAD = 820 Ω, CS = 20 pF – 0.2 1 μs Supply Current ICCON B > BOP – 1.6 3.5 mA ICCOFF B < BRP – 1.6 3.5 mA Reverse Battery Current I RCC VRCC = –18 V – – –2 mA Supply Zener Clamp Voltage V Z ICC = 6.5 mA; TA = 25°C 28 – – V Supply Zener Current3 IZ VS = 28 V – – 6.5 mA Magnetic Characteristics4 Operate Point B OP South pole adjacent to branded face of device 70 110 150 G Release Point B RP North pole adjacent to branded face of device –150 –110 –70 G Hysteresis B HYS BOP – BRP 140 220 300 G 1 Maximum voltage must be adjusted for power dissipation and junction temperature, see Power Derating section. 2 CS = oscilloscope probe capacitance. 3 Maximum current limit is equal to the maximum ICC(MAX) + 3 mA. 4 Magnetic fl ux density, B, is indicated as a negative value for north-polarity magnetic fi elds, and as a positive value for south-polarity magnetic fi elds. This so-called algebraic convention supports arithmetic comparison of north and south polarity values, where the relative strength of the fi eld is indicated by the absolute value of B, and the sign indicates the polarity of the fi eld (for example, a –100 G fi eld and a 100 G fi eld have equivalent strength, but opposite polarity). DEVICE QUALIFICATION PROGRAM Contact Allegro for information. EMC (Electromagnetic Compatibility) REQUIREMENTS Contact Allegro for information.

Chopper-Stabilized Hall Effect LatchA3282 4Allegro MicroSystems, Inc. Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com TA (°C) Supply Current (On) versus Ambient Temperature VCC (V) ICCON (mA) 24 3.6 TA (°C) Supply Current (Off) versus Ambient Temperature VCC (V) ICCOFF (mA) 24 3.6 TA (°C) Output Voltage (On) versus Ambient Temperature VCC (V) VOUT(SAT) (mV) 3.6 Supply Current (On) versus Supply Voltage TA (°C) ICCON (mA) VCC (V) –40 150 Supply Current (Off) versus Supply Voltage TA (°C) ICCOFF (mA) VCC (V) –40 150 Output Voltage (On) versus Supply Voltage TA (°C) VOUT(SAT) (mV) VCC (V) –40 150 1.0 2.0 3.0 4.0 5.0 1.0 2.0 3.0 4.0 5.0 1.0 2.0 3.0 4.0 5.0 1.0 2.0 3.0 4.0 5.0 –50 0 50 100 150 0 5 10 15 20 25 –50 0 50 100 150 0 5 10 15 20 25 –50 0 50 100 150 0 5 10 15 20 25 200 250 100 150 300 350 400 450 500 200 250 100 150 300 350 400 450 500 Electrical Characteristic Data

Chopper-Stabilized Hall Effect LatchA3282 5Allegro MicroSystems, Inc. Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com VCC (V) 3.8 TA (°C) VCC (V) 3.8 VCC (V) 3.8 TA (°C) –40 150 TA (°C) –40 150 TA (°C) –40 150 Operate Point versus Ambient Temperature BOP (G) TA (°C) Release Point versus Ambient Temperature BRP (G) TA (°C) Hysteresis versus Ambient Temperature BHYS (G) BOP (G)BRP (G)BHYS (G) Operate Point versus Supply Voltage Release Point versus Supply Voltage VCC (V) VCC (V) TA (°C) VCC (V) Hysteresis versus Supply Voltage –50 0 50 100 150 0 5 10 15 20 25 –50 0 50 100 150 0 5 10 15 20 25 –50 0 50 100 150 0 5 10 15 20 25 100 110 130 120 140 150 100 110 130 120 140 150 -150 -130 -140 -120 -90 -80 -100 -110 -70 -150 -130 -140 -120 -90 -80 -100 -110 -70 140 180 220 280 260 240 200 160 300 140 180 220 280 260 240 200 160 300 Magnetic Characteristic Data

Chopper-Stabilized Hall Effect LatchA3282 6Allegro MicroSystems, Inc. Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com THERMAL CHARACTERISTICS may require derating at maximum conditions, see application information Characteristic Symbol Test Conditions* Value Units Package Thermal Resistance RθJA Package LH, 1-layer PCB with copper limited to solder pads 228 ºC/W Package LH, 2-layer PCB with 0.463 in.2 of copper area each side connected by thermal vias 110 ºC/W Package UA, 1-layer PCB with copper limited to solder pads 165 ºC/W *Additional thermal information available on Allegro Web site. 20 40 60 80 100 120 140 160 180 Temperature (ºC) Maximum Allowable VCC (V) Power Derating Curve (RθJA = 228 ºC/W) 1-layer PCB, Package LH (RθJA = 110 ºC/W) 2-layer PCB, Package LH (RθJA = 165 ºC/W) 1-layer PCB, Package UA VCC(min) VCC(max) 100 200 300 400 500 600 700 800 900 1000 1100 1200 1300 1400 1500 1600 1700 1800 1900 20 40 60 80 100 120 140 160 180 Temperature (°C) Power Dissipation, PD (mW) Power Dissipation versus Ambient Temperature θJA =1 6 5º C / W ) 1-layer PCB, P ackage U A θJA = 228 ºC/W) 1-layer PC θJA = 110 ºC/W) 2-layer PCB, Packag eL H

Chopper-Stabilized Hall Effect LatchA3282 7Allegro MicroSystems, Inc. Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com Functional Description BOP BRP BHYS VCC VOUT VOUT(SAT) Switch to Low Switch to High B+B– VCC VS Sensor Output GND VOUT RLOAD A3282 0.1 µF CBYP Operation The output of these devices switches low (turns on) when a magnetic fi eld perpendicular to the Hall sensor exceeds the operate point threshold, B OP. After turn-on, the output voltage is VOUT(SAT). The output transistor is capable of sinking current up to the short circuit current limit, IOM, which is a minimum of 30 mA. Note that the device latches, that is, a south pole of suffi - cient strength towards the branded surface of the device turns the device on. The device remains on if the south pole is removed. When the magnetic fi eld is reduced below the release point, B RP , the device output turns off (goes high). The difference in the magnetic operate and release points is the hysteresis, B HYS , of the device. This built-in hysteresis allows clean switching of the output even in the presence of external mechanical vibration and electrical noise. Powering-on the device in the hysteresis region (less than B OP and higher than BRP) allows an indeterminate output state. The correct state is attained after the fi rst excursion beyond BOP or BRP .

Applications

It is strongly recommended that an external bypass capacitor be connected (in close proximity to the Hall sensor) between the supply and ground of the device to reduce both external noise and noise generated by the chopper stabilization technique. As is shown in Panel B of fi gure 1, a 0.1μF capacitor is typical. Extensive applications information on magnets and Hall-effect sensors is available in:

• Hall-Effect IC Applications Guide, AN27701,
• Hall-Effect Devices: Gluing, Potting, Encapsulating, Lead Welding and Lead Forming, AN27703.1
• Soldering Methods for Allegro’ s Products – SMT and Through- Hole, AN26009 All are provided in Allegro Electronic Data Book, AMS-702 and the Allegro Web site: www.allegromicro.com Figure 1: Switching Behavior of Latches. In Panel A, on the horizontal axis, the B+ direction indicates increasing south polarity magnetic fi eld strength, and the B– direction indicates decreasing south polarity fi eld strength (including the case of increasing north polarity). This behavior can be exhibited when using a circuit such as that shown in panel B. (A) (B)

Figure 2. Chopper Stabilization Circuit (Dynamic Quadrature Offset Cancellation) ating temperature and voltage ranges. of the output drift induced by thermal and mechanical stresses. contact your Allegro sales representative.

Chopper-Stabilized Hall Effect LatchA3282 9Allegro MicroSystems, Inc. Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com The device must be operated below the maximum junction temperature of the device, T J(max). Under certain combinations of peak conditions, reliable operation may require derating sup- plied power or improving the heat dissipation properties of the application. This section presents a procedure for correlating factors affecting operating T J. (Thermal data is also available on the Allegro MicroSystems Web site.) The Package Thermal Resistance, RθJA, is a fi gure of merit sum- marizing the ability of the application and the device to dissipate heat from the junction (die), through all paths to the ambient air. Its primary component is the Effective Thermal Conductivity, K, of the printed circuit board, including adjacent devices and traces. Radiation from the die through the device case, R θJC, is relatively small component of RθJA. Ambient air temperature, TA, and air motion are signifi cant external factors, damped by overmolding. The effect of varying power levels (Power Dissipation, PD), can be estimated. The following formulas represent the fundamental relationships used to estimate T J, at PD. PD = VIN × IIN (1) Δ T = PD × RθJA (2) T J = TA + ΔT (3) For example, given common conditions such as: TA= 25°C, VCC = 12 V, ICC = 1.5 mA, and RθJA = 165 °C/W, then: P D = VCC × ICC = 12 V × 1.5 mA = 18 mW Δ T = PD × RθJA = 18 mW × 165 °C/W = 3°C T J = TA + ΔT = 25°C + 3°C = 28°C A worst-case estimate, PD(max), represents the maximum allow- able power level (VCC(max), ICC(max)), without exceeding TJ(max), at a selected RθJA and TA. Example: Reliability for VCC at TA = 150°C, package LH, using a low-K PCB. Observe the worst-case ratings for the device, specifi cally: RθJA = 228 °C/W, TJ(max) = 165°C, VCC(max) = 24 V , and ICC(max) = 5 mA. Calculate the maximum allowable power level, PD(max). First, invert equation 3: ΔTmax = TJ(max) – TA = 165 °C – 150 °C = 15 °C This provides the allowable increase to TJ resulting from internal power dissipation. Then, invert equation 2: PD(max) = ΔTmax ÷ RθJA = 15°C ÷ 228 °C/W = 66 mW Finally, invert equation 1 with respect to voltage: VCC(est) = PD(max) ÷ ICC(max) = 66 mW ÷ 5 mA = 13 V The result indicates that, at TA, the application and device can dissipate adequate amounts of heat at voltages ≤VCC(est). Compare VCC(est) to VCC(max). If VCC(est) ≤ VCC(max), then reli- able operation between VCC(est) and VCC(max) requires enhanced RθJA. If VCC(est) ≥ VCC(max), then operation between VCC(est) and VCC(max) is reliable under these conditions. Power Derating

Chopper-Stabilized Hall Effect LatchA3282 10Allegro MicroSystems, Inc. Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com 1 321 2 Package LH Package UA Terminal List Name Description Number Package LH Package UA VCC Connects power supply to chip 1 1 VOUT Output from circuit 2 3 GND Ground 3 2 0.15 0.00 .006 .000 1.17 0.75 .046 .030 0.50 0.30 .020 .012 2.10 1.85 .083 .073 3.00 2.70 .118 .1061.49 NOM .059 0.96 NOM .038 0.20 0.08 .008 .003 0.60 0.25 .024 .010 CSEATING PLANE A B 0.20 [.008] M C A B 0.15 [.006] M C A B C0.10 [.004] 0.95 .037 1.90 .075 0.25 .010 3.04 2.80 .120 .110 GAUGE PLANE SEATING PLANE B A B Preliminary dimensions, for reference only Dimensions in millimeters U.S. Customary dimensions (in.) in brackets, for reference only (reference JEDEC TO-236 AB, except case width and terminal tip-to-tip) Dimensions exclusive of mold flash, gate burrs, and dambar protrusions Exact case and lead configuration at supplier discretion within limits shown Hall element (not to scale) Active Area Depth 0.28 [.011] A A A Pin-out Drawings

Chopper-Stabilized Hall Effect LatchA3282 11Allegro MicroSystems, Inc. Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com Package UA, 3-Pin SIP B D D D .164 .159 4.17 4.04 .122 .117 3.10 2.97 .062 .058 1.57 1.47 .017 .014 0.44 0.35 .019 .014 0.48 0.36 .640 .600 16.26 15.24 .085 MAX 2.16 .050 NOM 1.27 .031 REF 0.79 2.04 NOM .0805 1.44.0565 NOM Dimensions in inches Metric dimensions (mm) in brackets, for reference only 231 A A B C C Dambar removal protrusion (6X) Active Area Depth .0195 [0.50] NOM D Hall element (not to scale) Ejector mark on opposite side The products described herein are manufactured under one or more of the following U.S. patents: 5,045,920; 5,264,783; 5,442,28 3; 5,389,889; 5,581,179; 5,517,112; 5,619,137; 5,621,319; 5,650,719; 5,686,894; 5,694,038; 5,729,130; 5,917,320; and other patents pending. Allegro MicroSystems, Inc. reserves the right to make, from time to time, such de par tures from the detail spec i fi ca tions as may be required to permit improvements in the per for mance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the information being relied upon is current. Allegro products are not authorized for use as critical components in life-support devices or sys tems without express written approval. The in for ma tion in clud ed herein is believed to be ac cu rate and reliable. How ev er, Allegro MicroSystems, Inc. assumes no re spon si bil i ty for its use; nor for any in fringe ment of patents or other rights of third parties which may result from its use. Copyright © 2005, 2006 Allegro MicroSystems, Inc.