Secure Authenticator

Document overview

  • Manufacturer or author: NXP B.V.
  • PDF pages: 26

Technical content

Datasheet sections

  • 1 General description
  • 2 Features and use cases
  • 2.1 Use cases
  • 2.2 Key features
  • 2.3 Configuration
  • 2.4 Configuration as authenticator
  • 2.5 Configuration to secure IoT applications
  • 3 Ordering information
  • 4 Block diagram
  • 5 Pin description
  • 6 Limiting values
  • 7 Recommended operating conditions
  • 8 Characteristics
  • 8.1 DC characteristics
  • 8.1.1 General-purpose I/O interface
  • 8.1.2 I2C interface
  • 8.1.3 Power Consumption
  • 8.2 AC characteristics
  • 8.3 I2C Bus Timings
  • 8.4 EMC/EMI
  • 9 Package information
  • 9.1 WLCSP
  • 9.2 HVQFN
  • 10 Abbreviations
  • 11 References
  • 12 Note about the source code in the
  • 13 Revision history

Rev. 3.1 — 1 July 2026 Product data sheet

1 General description

A30 is a secure authentication IC for IoT platforms, electronic accessories, and consumable devices such as home electronic devices, mobile accessories, and medical supplies. A30 contains ECC key pairs, which can be generated by the IC itself to make sure that private keys are never exposed outside the IC. Also it performs cryptographic operations for security critical communication and control functions. A30 offers Common Criteria EAL 6+ security certification with AVA_VAN.5 on product level ref.[1] and supports a generic Crypto API providing AES, ECDSA, ECDH, SHA, HMAC, and HKDF cryptographic functionality for users. Asymmetric cryptography features support 256-bit ECC over the NIST P-256 and brainpoolP256r1 curves. Symmetric cryptography features support both AES-128 and AES-256. It also supports PKI-based mutual authentication including certificate handling. The CC security certification ensures that the IC security measures and protection mechanisms have been evaluated against sophisticated noninvasive and invasive attack scenarios. A30 supports an I2C contact interface with two GPIOs. A30 supports a low-power design, and consumes only 5 μA at Halt mode when an external VDD is supplied. Note: For the functional description and command set, refer to UM12553.

2 Features and use cases

2.1 Use cases

A30 can be used for:

  • Secure key(s) and certificate(s) storage
  • PKI (Public Key Infrastructure) based authentication and communication
  • Device only, device-to-device, and device-to-cloud authentication
  • Secure connection for consumer devices, industrial machines, and medical devices
  • Battery passport and/or Digital product passport
  • Device to meet increasing cybersecurity requirements

2.2 Key features

A30 is designed to support many IoT applications and solves the problems in IoT applications' full life cycle.

  • ECC key generation on the IC, and provisioning item level certificate(s) in NXP, or in the field.
  • The following cryptographic primitives are supported: AES-128/256 (ECB, CBC, CMAC, CCM, GCM), ECDSA, and ECDH over NIST P-256 and brainpoolP256r1, SHA-256/384, HMAC, and HKDF. This allows to support advanced cryptographic protocols such as SIGMA-I, TLS1.3 and Matter.
  • Nonreversible monotonic counter as the usage counter
  • Delivery of the list of UID and certificates at shipping from NXP
  • I2C target operates at 100 kHz (standard mode), 400 kHz (fast mode), or 1 MHz (Fast-mode Plus)
  • Two configurable GPIOs; 1 GPIO can be used for power downstream - up to 10 mW for batteryless

applications

  • 1 V operation with 1.5 V battery
  • Small footprint on PCB with WLCSP16 A30 All information provided in this document is subject to legal disclaimers. © 2026 NXP B.V. All rights reserved. Product data sheet Rev. 3.1 — 1 July 2026 Document feedback

2.3 Configuration

A30 can be used as an I2C target with Host MCU. Figure 1. A30 solution block diagram There are many configuration options for different types of applications.

2.4 Configuration as authenticator

ISOGeneralAuthenticate" in UM12553). Figure 2. A30 for the consumable authentication device has been powered up or used with a nonreversible monotonic counter.

2.5 Configuration to secure IoT applications

A30 can be used for many other IoT applications. and certificates securely, provide one-way and/or mutual authentication, and transferred sign data. Figure 3. A30 solution block diagram communications, for example, with Matter. A30 All information provided in this document is subject to legal disclaimers. © 2026 NXP B.V. All rights reserved.

3 Ordering information

Table 1. Ordering information A30 All information provided in this document is subject to legal disclaimers. © 2026 NXP B.V. All rights reserved.

4 Block diagram

Figure 4. Block diagram A30 All information provided in this document is subject to legal disclaimers. © 2026 NXP B.V. All rights reserved.

5 Pin description

Table 2. A30 pin configuration Please refer the available pin outs in the section Section 9. A30 All information provided in this document is subject to legal disclaimers. © 2026 NXP B.V. All rights reserved.

6 Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to VSS (ground = 0 V). Table 3. Limiting values [3] Depending on the appropriate thermal resistance of the package. electrostatic sensitive devices. A30 All information provided in this document is subject to legal disclaimers. © 2026 NXP B.V. All rights reserved.

7 Recommended operating conditions

A30 is characterized by its specified operating supply voltage range of 1 V to 2 V. Table 4. Recommended operating conditions [1] The supply voltage operating range of 1 V to 2 V requires internal supply elevation for the supply voltage range of 1 V to 1.62 V. The supply voltage mode is automatically selected during boot-up based on internal supply voltage measurement. the application to reopen the session. the device boots in voltage elevation mode. For VCC supply voltages >1.62 V the supply voltage ramp shall therefore >600 μs. [2] All product properties and values specified within this data sheet are only valid within the operating ambient temperature range. A30 All information provided in this document is subject to legal disclaimers. © 2026 NXP B.V. All rights reserved.

8 Characteristics

8.1 DC characteristics

respect to the ground contact pad VSS. All currents flowing into the device are considered positive.

8.1.1 General-purpose I/O interface

External pullup resistor 20 kΩ to VCC assumed. The worst case test condition for parameter VOH is present at minimum VCC.

0.7 VCC ≤ VI ≤ VCC

0 V ≤ VI ≤ VCC;

Table 5. Electrical DC characteristics of GPIO1/2 A30 All information provided in this document is subject to legal disclaimers. © 2026 NXP B.V. All rights reserved.

0 V VILmax

Figure 5. Input characteristics of GPIO1/2

8.1.2 I2C interface

Table 6. Electrical DC characteristics of I2C A30 All information provided in this document is subject to legal disclaimers. © 2026 NXP B.V. All rights reserved.

8.1.3 Power Consumption

Table 7. Electrical characteristics of IC supply voltage VCC

8.2 AC characteristics

Table 8. Authentication application timing Table 9. Nonvolatile memory timing characteristics [1] The given value specifies physical access times of FLASH memory only. Table 10. Nonvolatile memory data retention and endurance [1] Typical values are only referenced for information. They are subject to change without notice. A30 All information provided in this document is subject to legal disclaimers. © 2026 NXP B.V. All rights reserved.

SCL, SDA pads in open-drain mode. Table 11. Electrical AC characteristics of SDA, SCL [1] All appropriately marked values are typical values and only referenced for information. They are subject to change without notice. [3] tr is defined as rise time between 30 % and 70 % of the signal amplitude. [4] tf is defined as fall time between 70 % and 30 % of the signal amplitude.

8.3 I2C Bus Timings

The A30 I2C bus timing parameters are in accordance to the NXP I2C bus specification, see Section 11.

8.4 EMC/EMI

EMC and EMI resistance according to IEC 61967-4, see Section 11. A30 All information provided in this document is subject to legal disclaimers. © 2026 NXP B.V. All rights reserved.

9 Package information

A30 is either offered as Wafer Level Chip-Scale Package (WLCSP), or HVQFN.

9.1 WLCSP 16

Figure 6. Package outline WLCSP (Top view) Figure 7. Package outline WLCSP (Bottom view) A30 All information provided in this document is subject to legal disclaimers. © 2026 NXP B.V. All rights reserved.

9.2 HVQFN 20

Figure 8. Package outline HVQFN A30 All information provided in this document is subject to legal disclaimers. © 2026 NXP B.V. All rights reserved.

Figure 9. Pin description HVQFN A30 All information provided in this document is subject to legal disclaimers. © 2026 NXP B.V. All rights reserved.

10 Abbreviations

Table 12. Abbreviations A30 All information provided in this document is subject to legal disclaimers. © 2026 NXP B.V. All rights reserved.

Table 12. Abbreviations...continued A30 All information provided in this document is subject to legal disclaimers. © 2026 NXP B.V. All rights reserved.

A30 All information provided in this document is subject to legal disclaimers. © 2026 NXP B.V. All rights reserved.

11 References

[1] User Manual - UM12053 - NRV11 Information on Guidance and Operation, Doc. No. UM97631 [2] Data sheet addendum - A30 - Delivery specification, Document number AD9772 [3] User manual - UM12553 - A30 user manual (link) 1 ** … document version number A30 All information provided in this document is subject to legal disclaimers. © 2026 NXP B.V. All rights reserved. Product data sheet Rev. 3.1 — 1 July 2026 Document feedback

12 Note about the source code in the document

Example code shown in this document has the following copyright and BSD-3-Clause license: Copyright 2024-2026 NXP Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials must be provided with the distribution. 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. A30 All information provided in this document is subject to legal disclaimers. © 2026 NXP B.V. All rights reserved. Product data sheet Rev. 3.1 — 1 July 2026 Document feedback

  • Section 8.2 "AC characteristics": updated
  • Section 9.2 "HVQFN 20": Figure 9 "Pin description HVQFN " added
  • Section 11 "References": updated
  • Sections "Functional description" and "Command set" moved to UM12553 A30 v.3.0 [1] 27 January 2025 Initial version for the public release

Table 13. Revision history A30 All information provided in this document is subject to legal disclaimers. © 2026 NXP B.V. All rights reserved.

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Tab. 7. Electrical characteristics of IC supply Tab. 10. Nonvolatile memory data retention and A30 All information provided in this document is subject to legal disclaimers. © 2026 NXP B.V. All rights reserved. Product data sheet Rev. 3.1 — 1 July 2026 Document feedback

A30 All information provided in this document is subject to legal disclaimers. © 2026 NXP B.V. All rights reserved. Product data sheet Rev. 3.1 — 1 July 2026 Document feedback