A1318

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Description

New applications for linear output Hall-effect sensors, such as displacement and angular position, require higher accuracy and smaller package sizes. The Allegro A1318 and A1319 linear Hall-effect sensor ICs have been designed specifically to meet both requirements. These temperature-stable devices are available in both surface-mount and through hole packages. The accuracy of each device is enhanced via end-of-line optimization. Each device features non-volatile memory to optimize device sensitivity and the quiescent voltage output (QVO: output in the absence of a magnetic field) for a given application or circuit. This A1318 and A1319 optimized performance is sustained across the full operating temperature range by programming the temperature coefficient for both sensitivity and QVO at Allegro end-of-line test. These ratiometric Hall-effect sensor ICs provide a voltage output that is proportional to the applied magnetic field. The quiescent voltage output is adjusted around 50% of the supply voltage. The features of these linear devices make them ideal for use in automotive and industrial applications requiring high accuracy, and operate across an extended temperature range, –40°C to 150°C. Each BiCMOS monolithic circuit integrates a Hall element, temperature-compensating circuitry to reduce the intrinsic A1318-DS, Rev. 1. Features and Benefits

• 3.3 V supply operation QVO temperat ure coefficient programmed at Allegro™ for improved accuracy Miniature pack age options High bandwidt h, low noise analog output High speed cho pping scheme minimizes QVO drift across operating temperature range T emperature-stable quiescent voltage output and sensitivity Precise recove rability after temperature cycling Output voltage clamps provide short circuit diagnostic capabilities Undervoltage l ockout (UVLO) W ide ambient temperature range: –40°C to 150°C Immune to me chanical stress Enhanced EMC performance f or stringent automotive

applications

Linear Hall-Effect Sensor ICs with Analog Output Available in a Miniature, Low Profile Surface Mount Package Continued on the next page… Functional Block Diagram A1318 and A1319 Offset and Offset TC Sensitivity and Dynamic Offset Cancellation Tuned Filter Sensitivity TC VCC CBYPASS GND VOUT Packages Approximate footprint 3-pin SOT23-W 2 mm × 3 mm × 1 mm (suffix LH) 3-pin ultramini SIP 1.5 mm × 4 mm × 3 mm (suffix UA)

Linear Hall-Effect Sensor ICs with Analog Output Available in a Miniature, Low Profile Surface Mount Package A1318 and A1319 Allegro MicroSystems, LLC

115 Northeast Cutoff

Worcester, Massachusetts 01615-0036 U.S.A. Description (continued) Absolute Maximum Ratings Characteristic Symbol Notes Rating Unit Forward Supply Voltage VCC 8 V Reverse Supply Voltage VRCC –0.1 V Forward Output Voltage VOUT 7 V Reverse Output Voltage VROUT –0.1 V Output Source Current IOUT(SOURCE) VOUT to GND 2 mA Output Sink Current IOUT(SINK) VCC to VOUT 10 mA Operating Ambient Temperature TA Range L –40 to 150 ºC Maximum Junction Temperature TJ(max) 165 ºC Storage Temperature Tstg –65 to 170 ºC sensitivity drift of the Hall element, a small-signal high-gain amplifier, a clamped low-impedance output stage, and a proprietary dynamic offset cancellation technique. The A1318 and A1319 sensor ICs are offered in two package styles. The LH is a SOT-23W style, miniature, low profile package for surface-mount applications. The UA is a 3-pin, ultra-mini, single inline package (SIP) for through-hole mounting. Both packages are lead (Pb) free, with 100% matte tin leadframe plating. Selection Guide Part Number Output Polarity Sensitivity (typ) (mV/G) Packing* Package A1318LLHLX-1-T Forward 1.35 10,000 pieces per reel 3-pin SOT-23W surface mount A1318LLHLX-2-T Forward 2.5 10,000 pieces per reel 3-pin SOT-23W surface mount A1318LUA-2-T Forward 2.5 500 pieces per bag 3-pin SIP through hole A1319LLHLX-5-T Forward 5 10,000 pieces per reel 3-pin SOT-23W surface mount A1319LUA-5-T Forward 5 500 pieces per bag 3-pin SIP through hole *Contact Allegro™ for additional packing options

Linear Hall-Effect Sensor ICs with Analog Output Available in a Miniature, Low Profile Surface Mount Package A1318 and A1319 Allegro MicroSystems, LLC Worcester, Massachusetts 01615-0036 U.S.A. Pin-out Diagrams Terminal List Table Name Number Description LH UA VCC 1 1 Input power supply; tie to GND with bypass capacitor VOUT 2 3 Output signal GND 3 2 Ground 2 31 THERMAL CHARACTERISTICS may require derating at maximum conditions, see application information Characteristic Symbol Test Conditions Value Units Package Thermal Resistance RθJA Package LH, 1-layer PCB with copper limited to solder pads 228 ºC/W Package LH, 2-layer PCB with 0.463 in.2 of copper area each side connected by thermal vias 110 ºC/W Package UA, 1-layer PCB with copper limited to solder pads 165 ºC/W

Linear Hall-Effect Sensor ICs with Analog Output Available in a Miniature, Low Profile Surface Mount Package A1318 and A1319 Allegro MicroSystems, LLC Worcester, Massachusetts 01615-0036 U.S.A. OPERATING CHARACTERISTICS Valid over TA , CBYPASS = 0.1 µF, VCC = 3.3 V; unless otherwise noted Characteristic Symbol Test Conditions Min. Typ. Max. Unit 1 Continued on the next page…

Electrical Characteristics

Supply Voltage VCC 3 3.3 3.63 V Undervoltage Threshold2 VUVLOHI Tested at TA = 25°C and TA = 150°C (device powers on) – – 3 V VUVLOLO Tested at TA = 25°C and TA = 150°C (device powers off) 2.5 – – V Supply Current ICC No load on VOUT – 7.7 10 mA Power On Time3,4 tPO TA = 25°C, CL(PROBE) = 10 pF – 50 – µs VCC Ramp Time3,4 tVCC TA = 25°C 0.005 – 100 ms VCC Off Level3,4 VCCOFF TA = 25°C 0 – 0.33 V Delay to Clamp3,4 tCLP TA = 25°C, CL = 10 nF – 30 – µs Supply Zener Clamp Voltage VZ TA = 25°C, ICC = 13 mA 6 7.3 – V Internal Bandwidth4 BWi Small signal –3 dB – 20 – kHz Chopping Frequency5 fC TA = 25°C – 400 – kHz Output Characteristics Output Referred Noise4 VN VCC = 3.3 V, TA = 25°C, CBYPASS = open, Sens 5 mV/G, no load on VOUT – 13 – mV (p-p) Input Referred RMS Noise Density4 VNRMS VCC = 3.3 V, TA = 25°C, CBYPASS = open, Sens 5 mV/G, no load on VOUT, fmeasured << BWi – 2.3 – mG/√Hz DC Output Resistance4 ROUT – <1 – Ω Output Load Resistance4 RL VOUT to GND 4.7 – – kΩ Output Load Capacitance4 CL VOUT to GND – – 10 nF Output Voltage Clamp6 VCLPHIGH TA = 25°C, B = +400 G, RL = 10 kΩ (VOUT to GND) 2.842 2.97 3.069 V VCLPLOW TA = 25°C, B = –400 G, RL = 10 kΩ (VOUT to VCC) 0.264 0.33 0.462 V Sensitivity7 Sens A1318LLHLX-1-T TA = 25°C 1.289 1.35 1.411 mV/G A1318LLHLX-2-T 2.388 2.5 2.613 mV/G A1318LUA-2-T 2.388 2.5 2.613 mV/G A1319LLHLX-5-T 4.85 5 5.15 mV/G A1319LUA-5-T 4.85 5 5.15 mV/G Quiescent Voltage Output (QVO) V OUT(Q) A1318LLHLX-1-T TA = 25°C 1.638 1.65 1.662 V A1318LLHLX-2-T 1.638 1.65 1.662 V A1318LUA-2-T 1.638 1.65 1.662 V A1319LLHLX-5-T 1.635 1.65 1.665 V A1319LUA-5-T 1.635 1.65 1.665 V

Linear Hall-Effect Sensor ICs with Analog Output Available in a Miniature, Low Profile Surface Mount Package A1318 and A1319 Allegro MicroSystems, LLC Worcester, Massachusetts 01615-0036 U.S.A. OPERATING CHARACTERISTICS (continued) Valid over TA , CBYPASS = 0.1 µF, VCC = 3.3 V; unless otherwise noted Characteristic Symbol Test Conditions Min. Typ. Max. Unit 1 Electrical Characteristics (continued) Sensitivity Temperature Coefficient TCSens A1318LLHLX-1-T Programmed at TA = 150°C, calculated relative to Sens at 25°C A1318LLHLX-2-T 0.08 0.12 0.16 %/°C A1318LUA-2-T 0.08 0.12 0.16 %/°C A1319LLHLX-5-T 0.08 0.12 0.16 %/°C A1319LUA-5-T 0.08 0.12 0.16 %/°C Error Components Linearity Sensitivity Error LinERR – ±1.5 – % Symmetry Sensitivity Error SymERR – ±1.5 – % Ratiometry Quiescent Voltage Output Error8 RatVOUT(Q) Across supply voltage range (relative to VCC = 5 V) – ±1.5 – % Ratiometry Sensitivity Error8 RatSens Across supply voltage range (relative to VCC = 5 V) – ±1.5 – % Ratiometry Clamp Error9 RatVOUTCLP TA = 25°C, across supply voltage range (relative to VCC = 5 V) – ±1.5 – % Drift Characteristics Typical Quiescent Voltage Output Drift Across Temperature Range ∆VOUT(Q) A1318LLHLX-1-T TA = 150°C –15 – 5 mV A1318LLHLX-2-T –18 – 8 mV A1318LUA-2-T –13 0 13 mV A1319LLHLX-5-T –20 – 20 mV A1319LUA-5-T –15 0 15 mV Sensitivity Drift Due to Package Hysteresis ∆SensPKG TA = 25°C, after temperature cycling – ±2 – % 1 1 G (gauss) = 0.1 mT (millitesla), 2On power-up, the output of the device is held low until VCC exceeds VUVLOHI. After the device is powered, the output remains valid until VCC drops below VUVLOLO , when the output is pulled low . 3See the Characteristic Definitions section. 4Determined by design and characterization, not evaluated at final test. 5fC varies as much as approximately ±20% across the full operating ambient temperature range and process. 6VCLPLOW and VCLPHIGH scale with VCC due to ratiometry. 7Sensitivity drift through the life of the part, ΔSensLIFE , can have a typical error value ±3% in addition to package hysteresis effects. 8Percent change from actual value at VCC = 3.3 V, for a given temperature. 9Percent change from actual value at VCC = 3.3 V, TA = 25°C.

Worcester, Massachusetts 01615-0036 U.S.A. VCC(min), as shown in figure 1. its steady state voltage, as shown in figure 2. ranges of VCC and Operating Ambient Temperature, TA. tional to the magnitude and polarity of the magnetic field applied. and T2 is the TCSENS programming temperature of 150°C. Figure 1. Definition of Power On Time, tPO Figure 2. Definition of Delay to Clamp, tCLP

Linear Hall-Effect Sensor ICs with Analog Output Available in a Miniature, Low Profile Surface Mount Package A1318 and A1319 Allegro MicroSystems, LLC Worcester, Massachusetts 01615-0036 U.S.A. the Sensitivity Drift Across Temperature Range, ∆SensTC, is defined as: SensTA – SensIDEAL(TA) SensIDEAL(TA) ∆SensTC = × 100 (%) (5) Sensitivity Drift Due to Package Hysteresis Package stress and relaxation can cause the device sensitivity at TA = 25°C to change during and after temperature cycling. This change in sensitivity follows a hysteresis curve. For purposes of specifica- tion, the Sensitivity Drift Due to Package Hysteresis, ∆Sens PKG, is defined as: Sens(25°C)(2) – Sens(25°C)(1) Sens(25°C)(1) ∆SensPKG = × 100 (%) (6) where Sens(25°C)(1) is the programmed value of sensitivity at TA = 25°C, and Sens(25°C)(2) is the value of sensitivity at TA = 25°C after temperature cycling TA up to 150°C, down to –40°C, and back to up 25°C. Linearity Sensitivity Error The A1318 and A1319 are designed to provide linear output in response to a ramping applied magnetic field. Consider two magnetic fields, B1 and B2. Ideally, the sensitivity of a device is the same for both fields, for a given supply voltage and temperature. Linearity error is present when there is a difference between the sensitivities measured at B1 and B2. Linearity Sensitivity Error, LIN ERR , is calculated separately for positive (LinERR+) and negative (LinERR– ) applied magnetic fields. LINERR (%) is measured and defined as: Sens(B+)(2) Sens(B+)(1) Sens(B–)(2) Sens(B–)(1) 1–LinERR+ = × 100 (%) × 100 (%) 1–LinERR– =  (7) where: |VOUT(Bx) – VOUT(Q)| Bx SensBx = (8) and Bx are positive and negative magnetic fields, with respect to the quiescent voltage output, such that The effective linearity error is: max(|LinERR+| , |LinERR– |)LinERR = (9) The output voltage clamps, VCLPHIGH and VCLPLOW , limit the operating magnetic range of the applied field in which the device provides a linear output. The maximum positive and negative applied magnetic fields in the operating range can be calculated: VCLPHIGH – VOUT(Q) SensBMAX(+)  = VOUT(Q) – VCLPLOW SensBMAX(–)  = (10) Symmetry Sensitivity Error The magnetic sensitivity of the device is constant for any two applied magnetic fields of equal magnitude and opposite polarities. Symmetry error, Sym ERR (%), is measured and defined as: Sens(B+) Sens(B–) 1–SymERR = × 100 (%) (11) where SensBx is as defined in equation 10, and B+ and B– are positive and negative magnetic fields such that |B+| = |B–|. Ratiometry Error The A1318 and A1319 provide ratiometric output. This means that the Quiescent V oltage Output, VOUT(Q) , magnetic sensitivity, Sens, and clamp voltages, VCLPHIGH and VCLPLOW , are proportional to the supply voltage, VCC. In other words, when the supply voltage increases or decreases by a certain percentage, each characteristic also increases or decreases by the same percentage. Error is the difference between the measured change in the supply voltage relative to 3.3 V , and the measured change in each characteristic. The ratiometric error in quiescent voltage output, Rat VOUT(Q) (%), for a given supply voltage, VCC, is defined as: VOUT(Q)(VCC) / VOUT(Q)(3.3V) VCC / 3.3 (V)1–RatVOUT(Q) = × 100 (%) (12) The ratiometric error in magnetic sensitivity, RatSens (%), for a given supply voltage, VCC, is defined as: Sens(VCC) / Sens(3.3V) VCC / 3.3 (V)1–RatSens = × 100 (%) (13) The ratiometric error in the clamp voltages, RatVOUTCLP (%), for a given supply voltage, VCC, is defined as: VCLP(VCC) / VCLP(3.3V) VCC / 3.3 (V)1–RatVOUTCLP = × 100 (%) (14) where VCLP is either VCLPHIGH or VCLPLOW .

Worcester, Massachusetts 01615-0036 U.S.A. CC is above certain thresholds . tion to eliminate indeterminate output states. VCC(typ), 3.3 V (see figure 4). of the device (see figure 4). Figure 3. Definition of Undervoltage Lockout Figure 4. Definition of VCC Ramp Time, tVCC

Linear Hall-Effect Sensor ICs with Analog Output Available in a Miniature, Low Profile Surface Mount Package A1318 and A1319 Allegro MicroSystems, LLC Worcester, Massachusetts 01615-0036 U.S.A. A1318 A1319 VOUT GND0.13.3 V µF RL VCC 4.7 nF

Application Information

Figure 5. Typical Application Circuit Figure 6. Chopper Stabilization Technique voltages and precise recoverability after temperature cycling.

Linear Hall-Effect Sensor ICs with Analog Output Available in a Miniature, Low Profile Surface Mount Package A1318 and A1319 Allegro MicroSystems, LLC Worcester, Massachusetts 01615-0036 U.S.A. Package LH, 3-Pin (SOT-23W)

0.55 REF

0.25 BSC

0.95 BSC

0.95 1.00 0.70 2.40 A Active Area Depth, 0.28 mm REF B C C B Reference land pattern layout All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary to meet application process requirements and PCB layout tolerances Branding scale and appearance at supplier discretion A PCB Layout Reference View Standard Branding Reference View Branded Face N = Last three digits of device part number NNN 2.90 +0.10 –0.20 4°±4° 8X 10° REF 0.180+0.020 –0.053 0.05 +0.10 –0.05

0.25 MIN

1.91 +0.19 –0.06 2.98 +0.12 –0.08 1.00 ±0.13 0.40 ±0.10 For Reference Only; not for tooling use (reference DWG-2840) Dimensions in millimeters Dimensions exclusive of mold flash, gate burrs, and dambar protrusions Exact case and lead configuration at supplier discretion within limits shown D Hall element, not to scale D D D1.49 0.96

Linear Hall-Effect Sensor ICs with Analog Output Available in a Miniature, Low Profile Surface Mount Package A1318 and A1319 Allegro MicroSystems, LLC Worcester, Massachusetts 01615-0036 U.S.A. Package UA, 3-Pin SIP 2 31

1.27 NOM

1.02 MAX 45° 45° C 1.52 ±0.05 B Gate and tie bar burr area A B C Dambar removal protrusion (6X) A D E E E 1.44 2.04 E Active Area Depth, 0.50 mm REF Branding scale and appearance at supplier discretion Hall element (not to scale) For Reference Only; not for tooling use (reference DWG-9065) Dimensions in millimeters Dimensions exclusive of mold flash, gate burrs, and dambar protrusions Exact case and lead configuration at supplier discretion within limits shown Mold Ejector Pin Indent D Standard Branding Reference View = Supplier emblem N = Last three digits of device part number NNN 0.41 +0.03 –0.06 0.43 +0.05 –0.07 14.99 ±0.25 4.09 +0.08 –0.05 3.02 +0.08 –0.05

0.79 REF

10° Branded Face

Linear Hall-Effect Sensor ICs with Analog Output Available in a Miniature, Low Profile Surface Mount Package A1318 and A1319 Allegro MicroSystems, LLC Worcester, Massachusetts 01615-0036 U.S.A. For the latest version of this document, visit our website: www.allegromicro.com Copyright ©2009-2014, Allegro MicroSystems, LLC Allegro MicroSystems, LLC reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the information being relied upon is current. Allegro’s products are not to be used in any devices or systems, including but not limited to life support devices or systems, in which a failure of Allegro’s product can reasonably be expected to cause bodily harm. The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, LLC assumes no responsibility for its use; nor for any infringement of patents or other rights of third parties which may result from its use.

Revision History

Revision Revision Date Description of Revision Rev. 1 June 27, 2014 Update product offerings, V CLPHIGH