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Crystal Clock Oscillators
97SMO(K) (+5V FIXED MODELS)
STANDARD SMD CLOCK OSCILLATORS
97SMO(K)
STANDARD SPECIFICATIONS
| Item | Specifications | ||
| Generic part number | 97SMO(K)※1 | ||
| Frequency range | 1.000 MHz to 100.000 MHz | 1.000 MHz to 70.000 MHz | |
| Frequency stability (0˚C to ＋70˚C) over all conditions | 97SMO(KE) : ±100 ppm 97SMO(KF) : ±50 ppm 97SMO(KG) : ±30 ppm 97SMO(KH) : ±25 ppm 97SMO(KJ) : ±20 ppm | 97SMO(KX) : ±100 ppm 97SMO(KY) : ±50 ppm 97SMO(KZ) : ±30 ppm 97SMO(KZS) : ±25 ppm 97SMO(KZZ) : ±20 ppm | |
| Operating Conditions Operating temperature Input voltage (VDD) Tri-state control voltage (Pin#1) | 0˚C to ＋70˚C (standard) -40˚C to ＋85˚C (W) ＋5V DC ±10% VIH : ＋2.2VDD min. VIL : ＋0.8VDD max.※2 | ||
| Absolute Max. Ratings Supply voltage Storage temperature | -0.5V to ＋7.0V DC -55˚C to ＋125˚C | ||
| Input current | 20 mA max. (1.0MHz to 37.0MHz) 30 mA max. (1.0MHz to 37.0MHz) 45 mA max. (33.0MHz to 50.0MHz) 55 mA max. (33.0MHz to 50.0MHz) 50 mA max. (50.0MHz to 70.0MHz) 60 mA max. (50.0MHz to 70.0MHz) 70 mA max. (70.0MHz to 100.0MHz) | ||
| Stand-by current※2 | 50μA max. (Pin #1=VIL) | ||
| Output (-40˚C to ＋85˚C) Symmetry Rise and fall times "0" level "1" level Load | 40% to 60% at 50%VDD level 10 ns max. (10%VDD to 90%VDD level) VOL : 10%VDD max. VOH : 90%VDD min. | ||
| 15 pF max. (CMOS) | 50 pF max. (CMOS) | ||
| Enable / Disable delay time | 100 ns max. | ||
| Startup time | 10 ms max. | ||
| Aging | ±5 ppm max. at ＋25˚C ±3˚C for first year | ||
| Reflow condition | ＋250˚C ±10˚C for 10 seconds ＋170˚C ±10˚C for 1 to 2 minutes (preheating) | ||
| (※1) Final exact part number to be determined with frequency, frequency stability and operating temperature. e.g. 97SMO(KY)W 50.000 MHz. (※2) Internal crystal oscillation to be halted (Pin#1 = VIL). PACKAGE DATA Item Package 97SMO(K) Lid Metal Base Ceramic Sealing Seam Terminal Tungsten (metalized) Gold / Nickel Terminal plating TAPE SPECIFICATIONS (surface) / (under) RoHS Compliant (Pb-free) 4.0±0.1 L 2.0±0.1 1.75±0.1 φ1.5+ -0 0.1 A D C J M B F | |||
97SMO(K)
7.0±0.2 #4 #3
#1 #2
1.4 3.68 1.4 #1 #2
#4 #3 5.08
PIN CONNECTION 1 "L" OPEN or "H" 2 GND 3 Z OUTPUT 4 VDD Z : high impedance
OUTPUT WAVEFORM
TEST CIRCUIT
| Package Item | 97SMO(K) |
| Lid | Metal |
| Base | Ceramic |
| Sealing | Seam |
| Terminal | Tungsten (metalized) |
| Terminal plating | Gold / Nickel (surface) / (under) |
| RoHS | Compliant (Pb-free) |
Test Point
SOLDERING PATTERN
| A | B | C | D | F | J L | M R | eel Dia. | Qty/Reel |
| 7.65 | 5.75 1 | 6.0 | 7.5 | 8.0 | 2.0 0.3 | 2.2 | 178 | 1000pcs |