8958

8958 ALLEGRO

Document overview

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Technical content

Providing control and drive of the voice coil motor used for head positioning in disk drive applications, the A8958CLB is a full-bridge driver which can be configured so that its output current is a direct function of an externally applied control voltage or current. This linear current control function is supplemented by additional circuitry to protect the heads and the data disk during system failure or normal system shutdown. The two ±800 mA driver outputs provide very-low saturation voltage drops and precise current control utilizing a single current-sensing resistor connected in series with the load. Under-voltage lockout disables the system in a controlled sequence if a fault condition occurs. When activated by the under-voltage comparator, or a park com- mand, the output power drivers change from a controlled current to a user-determined constant park voltage. Other features include a power ok flag, a limit input to force the outputs to their maximum level in either polarity, an over-riding output disable to shut down both power amplifi- ers and reduce quiescent supply current, and internal thermal shutdown which disables the load (but still allowing the head to be parked) in the event of excessive junction temperatures. The load is re-enabled when the junction temperature returns to a safe level. The A8958CLB is supplied in a 24-lead power SOIC for surface- mount applications. The copper batwing construction provides for maximum package power dissipation in a minimum package size. It is rated for continuous operation over the temperature range of 0°C to +70°C.

FEATURES

I Controlled-Velocity Head Parking I Zero Deadband I High Transconductance Bandwidth I User-Adjustable Transconductance Gain I ±800 mA Load Current I Dual Under-Voltage Monitors with Flag and User-Selectable Trip Points I Internal Thermal Shutdown Circuitry I Replaces UC3175 VOICE COIL MOTOR DRIVER Data Sheet26300.5A * Fault conditions that produce excessive junction temperature will activate device thermal shutdown circuitry. These conditions can be tolerated but should be avoided. ABSOLUTE MAXIMUM RATINGS at TA = 25°C Park Drive Output Current, IPARK Amplifier Input Voltage Range, Sense Input Voltage Range, Comparator and Digital Inputs, Output Clamp Diode Current, Package Power Dissipation, PD ..See Graph Operating Temperature Range, Storage Temperature Range, Always order by complete part number, e.g., A8958CLB . 8958 Dw g. PP-054 GROUND OUT BOUT A VCC INHIBIT PARK VOLTAGE LIMIT PARK LOGIC SUPPLY LOAD SUPPLY PARK DRIVE UV 1 UV 2 VBB 1.5 V PWR OK SENSE IN+ SENSE OUT1 1312 SENSE IN– INA+ INA– GROUND AB GROUND AB GROUND AB GROUND AB INB– INB++ B A

115 Northeast Cutoff, Box 15036

Worcester, Massachusetts 01615-0036 (508) 853-5000 FUNCTIONAL BLOCK DIAGRAM GROUND Dwg. FP-020C 1.5 V LOGIC SUPPLY OUT OUTA B SENSE OUT PARK VOLTAGE LIMIT PARK PWR OK (ACTIVE HIGH) PARK DRIVE B V BB A 1.5 V 1.5 V 3 V V CC1.5 V BANDGAP REF 4 kΩ 4 kΩ 8 kΩ 8 kΩ INHIBIT LOAD SUPPLY TSD GROUND AB UV 1 UV 2 INB– INB+ A–IN A+IN GROUND AB IN+SENSE IN–SENSE 12 13 6, 7 18, 19 50 75 100 125 150 ALLOWABLE PACKAGE POWER DISSIPATION IN WATTSTEMPERATURE IN °C Dwg. GP-033A R = 6.0°C/WθJT R = 55°C/W θJA Copyright © 1990, 2000 Allegro MicroSystems, Inc.

www.allegromicro.com ELECTRICAL CHARACTERISTICS at TA = +25°C, VCC = VBB = 12 V Limits Characteristic Symbol Test Conditions Min. Typ. Max. Units Logic Supply Voltage Range V CC Operating 8.0 12 16 V Logic Supply UV Threshold V CC High-to-low transition — 2.8 3.0 V Logic Supply UV Hysteresis ∆VCC — 200 — mV Supply Current I BB VOUT = 6 V, no load — 2.0 — mA ICC — 23 — mA Inhibited Supply Current — IBB + ICC , V2 ≥ 1.7 V — 3.0 8.0 mA Thermal Shutdown Temp. T J — 165 — °C Thermal Shutdown Hysteresis ∆TJ — 8.0 — °C Output Power Drivers Output Saturation Voltage V SAT IOUT = 250 mA — 250 — mV IOUT = 800 mA — 450 — mV IOUT = -250 mA — 750 — mV IOUT = -800 mA — 950 — mV Total Saturation Voltage V SAT ILOAD = 250 mA — 1.0 1.4 V ILOAD = 800 mA — 1.4 2.0 V Input Offset Voltage V IO VCM = 6 V — 5.0 8.0 mV Input Offset Drift ∆VIO —— 25 µV/°C Input Bias Current I IN Except INA+ , VCM = 6 V — -150 -500 nA INA+ to SENSEIN+ = 12 kΩ , TJ = 25°C 69 84 105 µA/V Input Offset Current I IO INB only, VCM = 6 V —— 200 nA Differential Sense Input Current IID IOUT = 5 mA — ±300 — µA IOUT = 500 mA — 3.0 — mA Large Signal Gain A VS VOUT = 2 V to 10 V, IOUT = ±500 mA 1.5 5.0 — V/mV Slew Rate SR — 4.0 — V/µs Unity Gain Bandwidth BW Amplifier A 0.5 1.0 1.7 MHz Amplifier B 0.5 2.0 2.2 MHz Common-Mode Rejection k CMR VCM = 1 V to 10 V 70 90 — dB Clamp Diode Forward Voltage V F IF = 800 mA, V2 ≥ 1.7 V — 1.0 1.2 V High-Side Current Limit I OUT TJ = 25°C — 1.0 1.2 A Power Supply Rejection k SVR VCC = 4 V to 15 V, VCM = 1.5 V 70 90 — dB (Source + Sink) Continued next page...Negative current is defined as coming out of (sourcing) the specified device terminal. Typical Data is for design information only.

Worcester, Massachusetts 01615-0036 (508) 853-5000 Current Sense Amplifier Input Offset Voltage V IO VCM = 6 V —— 2.0 mV Input Offset Drift ∆VIO VCM = 0 V to 12 V —— 3000 µV/V —— 8.0 µV/°C Voltage Gain A VS VID = -1 V to +1 V, VCM = 6 V 1.95 2.00 2.05 — Output Saturation Voltage V SAT VOUT , IOUT(SINK) = 1.5 mA — 300 500 mV VCC - VOUT , IOUT(SOURCE) = -1.5 mA — 400 700 mV Park Function PARK DRIVE Leakage Current I CEX VCEX = 20 V —— 100 µA PARK DRIVE Saturation Voltage VCE(SAT) IC = 200 mA — 300 500 mV PARK Input Threshold V PARK 0.7 1.1 1.7 V PARK Input Current I PARK VPARK = 1.7 V —— 100 µA PARK VOLTAGE Input Current I PARK V — -150 -500 nA Under-Voltage Protection UV Threshold V UV Low-to-High Trans., Other Input = 6 V 1.48 1.50 1.52 V UV Threshold Hysteresis ∆VUV 15 25 45 mV UV Input Current I UV VUV = 1 V — -0.5 -1.5 µA PWR OK Saturation Voltage V CE(SAT) IC = 5 mA —— 450 mV PWR OK Leakage Current I CEX VCEX = 20 V —— 5.0 µA Auxiliary Functions LIMIT Input Voltage V LIMIT(L) OUT A forced Low 0.7 0.8 — V VLIMIT(H) OUT A forced High — 2.2 2.3 V VLIMIT Limit inactive 1.2 — 1.8 V Open circuit 1.45 1.50 1.55 V LIMIT Input Resistance R LIMIT VLIMIT = 1.2 V to 1.8 V — 10 — kΩ INHIBIT Input Threshold V 2 0.7 1.1 1.7 V INHIBIT Input Current I 2 V2 = 1.7 V —— 200 µA Negative current is defined as coming out of (sourcing) the specified device terminal. Typical Data is for design information only. ELECTRICAL CHARACTERISTICS (continued) Limits Characteristic Symbol Test Conditions Min. Typ. Max. Units

www.allegromicro.com Term. Terminal Name Function 1 LOGIC SUPPLY V CC ; logic supply voltage. 2 INHIBIT An active-high logic input that inhibits the output stages without initiating a park. 3 & 4 UV 1 and UV2 Under-voltage detection inputs. If not used, these terminals must be connected to the logic supply (VCC ).

5 LIMIT A tri-state input that forces the output of amplifier A into saturation in either direction,

or allows normal linear operation. 6 & 7 GROUND AB Power amplifiers’ ground and thermal heat sink. 8 PARK VOLTAGE Auxiliary inverting input to power amplifier A. 9 SENSE IN– Inverting input to current sense error amplifer. 10 IN A+ Non-inverting input to power amplifier A. 11 IN A– Inverting input to power amplifier A. 12 OUT A Power amplifier A output to voice coil motor. 13 OUT B Power amplifier B output to voice coil motor. 14 LOAD SUPPLY V BB ; load supply voltage. 15 IN B– Inverting input to power amplifier B. 16 IN B+ Non-inverting input to power amplifier B. 17 SENSE IN+ Non-inverting input to current sense error amplifer. 18 & 19 GROUND AB Power amplifiers’ ground and thermal heat sink. 20 PWR OK A logic low at this output indicates an under-voltage condition. 21 GROUND Circuit reference. 22 PARK An active-high logic input that activates the park function. 23 PARK DRIVE Power transistor for retract current control on power down or park command. 24 SENSE OUT Output of current sense error amplifier. TERMINAL FUNCTIONS

Worcester, Massachusetts 01615-0036 (508) 853-5000 Dwg. EP-039 B A INB+ INB– OUT A OUT B I PARK PARK VOLTAGE 1.5 V 1.5 V 3 V V CC R SENSE PARK PWR OK (ACTIVE HIGH) PARK DRIVE UV 2 UV1 R 2 R 1 OPTIONAL PARK CURRENT LIMIT VOUT A = 1.5 (R1 + R2) R 2 PARKING FUNCTION CURRENT SENSING R Dwg. EP-034 B A 4 kΩ 4 kΩ 8 kΩ 8 kΩ SENSE OUT IN+SENSE IN–SENSE A–IN A+IN INB+ INB– OUT A OUT B SENSE R FA R FB 10 kΩ 10 kΩ VS 500 pF 330 k Ω I LOAD

www.allegromicro.com 0° TO 8 1 2 3 7.60 7.40 15.60 15.20 10.65 10.00 0.51 0.33 2.65 2.35 0.10 MIN. 0.32 0.23 Dwg. MA-008-25A mm 1.27 BSC 24 13 NOTE 1 NOTE 3 1.27 0.40 NOTES: 1. Webbed lead frame. Leads 6, 7, 18, and 19 are internally one piece. 2. Lead spacing tolerance is non-cumulative. 3. Exact body and lead configuration at vendor’s option within limits shown. Dimensions in Inches (for reference only) Dimensions in Millimeters (controlling dimensions) 0° TO 8 1 2 3 0.2992 0.2914 0.6141 0.5985 0.491 0.394 0.020 0.013 0.0926 0.1043 0.0040 MIN. 0.0125 0.0091 Dwg. MA-008-25 in 0.050 BSC 24 13 NOTE 1 NOTE 3 0.050 0.016

Worcester, Massachusetts 01615-0036 (508) 853-5000 The products described here are manufactured under one or more Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the information being relied upon is current. Allegro products are not authorized for use as critical components in life-support devices or systems without express written approval. The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsi- bility for its use; nor for any infringement of patents or other rights of third parties which may result from its use.