8284 ALLEGRO
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27448.1 8284 TWO-OUTPUT LNB SUPPLY AND CONTROL-VOLTAGE REGULATOR Always order by complete part number, e.g., A8284SLB . ABSOLUTE MAXIMUM RATINGS Output Current, IO .... Internally Limited Logic Input Voltage Range, Operating Temperature Range, Storage Temperature Range,
FEATURES
I Complete Interface for Two LNBs Remote Supply and Control I LNB Selection and Stand-By Function I Built-In Tone Oscillator Factory Trimmed to 22 kHz, Facilitates DiSEqC™ (a trademark of EUTELSAT) Encoding I Full Modulation With No Load I Tracking Switch-Mode Power Converter for Lowest Dissipation I Externally Adjustable Short-Circuit Protection I LNB Short-Circuit Protection and Diagnostics I Auxiliary Modulation Input I Cable Length Compensation I Internal Over-Temperature Protection This device incorporates features that have patents pending. Intended for analog and digital satellite receivers, the low noise block converter regulator (LNBR) is a monolithic linear and switching voltage regulator designed to provide power and interface signals to the LNB downconverter via the coaxial cable. Because most satellite receivers have two antenna ports, the output voltage of the regulator is available at one of two logic-selectable output terminals (LNBA, LNBB). If the device is in stand-by mode (EN terminal LOW), both regulator outputs are disabled, allowing the antenna downconverters to be supplied and controlled by other satellite receivers sharing the same coaxial cable. Similar single-output devices, with a bypass function for slave operation in single-dish dual-receiver systems, are the A8283SB/SLB. The regulator outputs are set to 12, 13, 18, or 20 V by the VSEL terminals. Additionally, it is possible to increase the selected voltage by 1 V to compen- sate for the voltage drop in the coaxial cable (LLC terminal HIGH). The LNBR combines a tracking switching regulator and low-noise linear regulators. Logic inputs (VSEL0, VSEL1, and LLC) select the desired output voltage. A tracking current-mode buck converter provides the linear regulator input voltage that is set to the output voltage plus typically 0.8 V. This maintains constant voltage drop across the linear regulators while permitting adequate voltage range for tone injection. The device is supplied in a 24-pin plastic DIP with batwing tabs (A8284SB), or a 24-lead SOIC power-tab package (A8284SLB). In both cases, the power tab is at ground potential and needs no electrical isolation. Note that the A8284SB (dual in-line package) and A8284SLB (small-outline IC package) are electrically identical and share a common terminal number assignment. A8284SLB 178 EXTM VINT PUMPX VPUMP CPUMP GND GND ENT EN VSEL0 VSEL1 LLC OSEL OLF VBULK LNBB NC GND GND SENSE LNBA LX VIN TCAP CHARGE PUMP VOLTAGE CONTROL REG. BUCK Dwg. PP-072-1A ADVANCE INFORMATION (Subject to change without notice) December 22, 2000
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-50002 FUNCTIONAL BLOCK DIAGRAM OSEL VSEL0 VSEL1 LLC V LNBA(typ) VLNBB(typ) L LLL 1 3 VL o w L L L H 14 V Low L L H L 18 V Low L L H H 19 V Low L H L L 12 V Low L H L H 13 V Low L H H L 20 V Low LHHH 2 1 VL o w H LLL L o w1 3 V H L L H Low 14 V H L H L Low 18 V H L H H Low 19 V H H L L Low 12 V H H L H Low 13 V H H H L Low 20 V H HHH L o w2 1 V Output Voltage Select Table Copyright © 2000, Allegro MicroSystems, Inc. VREF OVER-CURRENT TSD 352 kHz OVER- CURRENT RS 150 mV 800 mV 176 kHz 22 kHz TONE ENT PUMPX CPUMP VPUMP OLF VSEL0 VSEL1 LLC TCAP EXTM SENSE VIN LX VBULK 5 kΩ 1 kΩ LNBA OSEL BOOST VOLTAGE 7 V 47 V MAX CHARGE PUMP BUCK CONV. ÷8 & WAVESHAPING LNBB Dwg. FP-051 VINT EN 5 V VOLTAGE REG. 25 kΩ 5 kΩ
www.allegromicro.com 3 ELECTRICAL CHARACTERISTICS at TA = 25°C, OSEL = H for LNBB, OSEL = L for LNBA (each output tested separately), ENT = L, EN = H, LLC = L, VIN = 24 V, IO = 50 mA (unless otherwise noted). Limits Characteristic Symbol Test Conditions Min. Typ. Max. Units Supply Voltage V IN IO = 600 mA, VSEL0 = L, VSEL1 = L, LLC = L — 3.3 + ∆VBUCK 47 V Output Voltage V O IO = 600 mA, VSEL0 = L, VSEL1 = L, LLC = L 12.5 13 13.5 V IO = 600 mA, VSEL0 = L, VSEL1 = L, LLC = H 13.4 14 14.6 V IO = 600 mA, VSEL0 = L, VSEL1 = H, LLC = L 17.3 18 18.7 V IO = 600 mA, VSEL0 = L, VSEL1 = H, LLC = H 18.2 19 19.8 V IO = 600 mA, VSEL0 = H, VSEL1 = L, LLC = L 11.5 12 12.5 V IO = 600 mA, VSEL0 = H, VSEL1 = L, LLC = H 12.5 13 13.5 V IO = 600 mA, VSEL0 = H, VSEL1 = H, LLC = L 19.2 20 20.8 V IO = 600 mA, VSEL0 = H, VSEL1 = H, LLC = H 20.2 21 21.8 V Line Regulation ∆VO VO = 13 V, VI = 16 to 40 V — 4.0 40 mV VO = 18 V, VI = 21 to 40 V — 4.0 40 mV Load Regulation ∆VO VO = 13 or 18 V, IO = 50 to 600 mA — 80 180 mV Current-Limiting Threshold V OM(th) 125 135 145 mV Tone Frequency f tone ENT = H 20 22 24 kHz Tone Amplitude V tone(PP) ENT = H 550 680 800 mV Tone Duty Cycle dc tone ENT = H 40 50 60 % Tone Rise or Fall Time t r, tf ENT = H 5.0 10 15 µs External Modulation Gain G mod ∆VO/∆Vmod, f = 10 Hz to 40 kHz — 5.0 — V/V External Modulation V mod(PP) AC coupling — — 160 mV Input Voltage External Modulation Z mod f = 10 Hz to 40 kHz — 5.0 — k Ω Impedance continued next page ...
Worcester, Massachusetts 01615-0036 (508) 853-50004 ELECTRICAL CHARACTERISTICS at TA = 25°C, ENT = L, EN = H, LLC = L, VIN = 24 V, IOUT = 50 mA (unless otherwise noted). Limits Characteristic Symbol Test Conditions Min. Typ. Max. Units Overload Flag Logic Low V OL IOL = 8 mA — 0.28 — V Overload Flag I OZ VOH = 5.5 V — <1.0 — µA Leakage Current Logic Input Voltage V IL ——0 . 8V VIH 2.0 — — V Logic Input Current I IH VIH = 5 V — <1.0 — µA Supply Current I IN Outputs disabled (EN = L) — 0.5 — mA ENT = H, IO = 600 mA, VO = 13 V — 382 — mA Thermal Shutdown Temp. T J — 165 — °C Linear Regulator Voltage Drop ∆VBUCK VBULK – VO —0 . 8— V Switching Frequency f O 16 • ftone 320 352 384 kHz
www.allegromicro.com 5 The ENT (Tone Enable) terminal activates the internal tone signal, modulating the dc output with a ±0.3 V, 22 kHz symmetrical waveform. The internal oscillator is factory trimmed to provide a tone of 22 kHz ± 2 kHz. No further adjustment is required. The internal oscillator operates the buck converter at 16 times the tone fre- quency. Burst coding of the 22 kHz tone can be accomplished, due to the fast response of the ENT input and rapid tone response. This allows implementation of the DiSEqC™ protocols. To improve design flexibility and to allow implemen- tation of proposed LNB remote control standards, an analog modulation input terminal is available (EXTM). An appropriate dc blocking capacitor must be used to couple the modulating signal source to the EXTM termi- nal. If external modulation is not used, the EXTM termi- nal can be left open. The output linear regulators will sink and source current. This feature allows full modulation capability into capacitive loads as high as 0.25 µF. The programmed output voltage rise and fall times can be set by an internal 25 kΩ resistor and an external capacitor located on the TCAP terminal. Although any value of capacitor is permitted, practical values are typically 0.001 µF to 0.02 µF. This feature only affects the turn on and programmed voltage rise and fall times. Modulation is unaffected by the choice of TCAP. This terminal can be left open if voltage rise and fall time control is not required. Two terminals are dedicated to the over-current protection/monitoring: SENSE and OLF. The LNB output is current limited. The short-circuit protection threshold is set by the value of an external resistor, R S, between terminals 3 and 8. RS = VOM(th)/IOM where VOM(th) is the current-limiting threshold voltage and IOM is the desired current limit value. The minimum recommended value for R S is 0.17 Ω. In operation, the short-circuit protection produces current fold-back at the input due to the tracking con- verter. If the output is shorted the linear regulator will limit the output current to I OM. The tracking converter will maintain a constant voltage drop of 0.8 V across the linear regulator. This condition results in typically 550 mW dissipation (I OM • 0.8 V). Short-circuit or thermal shutdown activation will cause the OLF terminal, an open- drain diagnostic output flag, to go LOW. Thermal resistance: DIP — R θJA = 40°C/W, RθJT = 6°C/W, SOIC — RθJA = 55°C/W, RθJT = 6°C/W. The device junction temperature should be kept below 150°C. Thermal shut-down circuitry turns off the device if junction temperature exceeds +165°C typically. FUNCTIONAL DESCRIPTION The products described here are manufactured under one or more Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the information being relied upon is current. Allegro products are not authorized for use as critical components in life-support devices or systems without express written approval. The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsi- bility for its use; nor for any infringement of patents or other rights of third parties which may result from its use.
Worcester, Massachusetts 01615-0036 (508) 853-50006 Symbol Terminal Function OSEL 1 Logic input: selects between LNBA (when low) and LNBB (when high) OLF 2 Overload flag output: low when I O > IOM or TJ > 165°C, high when IO < IOM and TJ < 130°C VBULK 3 Tracking supply voltage to linear regulators LNBB 4 Output voltage to LNBB NC 5 No (internal) connection GND 6, 7 Ground SENSE 8 Current limit setup resistor LNBA 9 Output voltage to LNBA LX 10 Inductor drive point VIN 11 Supply input voltage (minimum, VLNB + 2.5 V) TCAP 12 Capacitor for setting the rise and fall time of the outputs LLC 13 Logic input: when high, increases output voltage by 1 V for line length compensation VSEL1 14 Logic input: output voltage select VSEL0 15 Logic input: output voltage select EN 16 Logic input: when high, enables device (LNB on) ENT 17 Logic input: when high, enables internal 22 kHz modulation GND 18, 19 Ground CPUMP 20 High side of charge-pump capacitor VPUMP 21 Gate supply voltage for high-side drivers PUMPX 22 Charge-pump drive VINT 23 Bypass capacitor for internal voltage reference EXTM 24 External modulation input Terminal Configuration
www.allegromicro.com 7 A8284SB Dimensions in Inches (controlling dimensions) Dimensions in Millimeters (for reference only) 0.014 0.008 0.300 BSC Dwg. MA-001-25A in 0.430 MAX 16 12 0.280 0.240 0.210 MAX 0.070 0.045 0.015 MIN 0.022 0.014 0.100 BSC 0.005 MIN 0.150 0.115 1.280 1.230 NOTE 1 0.355 0.204 7.62 BSC Dwg. MA-001-25A mm 10.92 MAX 1 12 7.11 6.10 5.33 MAX 1.77 1.15 0.39 MIN 0.558 0.356 2.54 BSC 0.13 MIN 3.81 2.93 32.51 31.24 NOTE 1 NOTES: 1. Webbed lead frame. Leads 6, 7, 18, and 19 are internally one piece. 2. Exact body and lead configuration at vendor’s option within limits shown. 3. Lead spacing tolerance is non-cumulative 4. Lead thickness is measured at seating plane or below.
Worcester, Massachusetts 01615-0036 (508) 853-50008 A8284SLB Dimensions in Inches (for reference only) Dimensions in Millimeters (controlling dimensions) 0° TO 8 1 2 3 0.2992 0.2914 0.6141 0.5985 0.491 0.394 0.020 0.013 0.0926 0.1043 0.0040 MIN. 0.0125 0.0091 Dwg. MA-008-25 in 0.050 BSC 24 13 NOTE 1 NOTE 3 0.050 0.016 0° TO 8 1 2 3 7.60 7.40 15.60 15.20 10.65 10.00 0.51 0.33 2.65 2.35 0.10 MIN. 0.32 0.23 Dwg. MA-008-25A mm 1.27 BSC 24 13 NOTE 1 NOTE 3 1.27 0.40 NOTES: 1. Exact body and lead configuration at vendor’s option within limits shown. 2. Lead spacing tolerance is non-cumulative 3. Webbed lead frame. Leads 6, 7, 18, and 19 are internally one piece.