8182

8182 ALLEGRO

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Technical content

LOW-DROPOUT,

3 V REGULATOR

— FOR REFERENCE ONLY Designed specifically to meet the requirement for extended opera- tion of battery-powered equipment such as cordless and cellular telephones, the A8182SL voltage regulator offers the reduced dropout voltage and quiescent current essential for maximum battery life. Applicable also to palmtop computers and personal data assistants, the device delivers a regulated 3 V output at up to 150 mA. A PMOS pass element provides a typical dropout voltage of only 85 mV at 60 mA of load current. The low dropout voltage permits deeper battery discharge before output regulation is lost. Furthermore, quiescent current does not increase as the dropout voltage is approached, an ideal feature in standby/resume power systems where data integrity is crucial. Regulator accuracy and excellent temperature characteristics are provided by a bandgap reference. An ENABLE input and RESET output gives the designer complete control over power up, standby, or power down. This device is supplied in an 8-lead small-outline plastic package (SOIC) for surface-mount applications. The A8182SL is rated for operation over a temperature range of -20°C to +85°C. FEATURES AND BENEFITS n High Efficiency Provides Extended Battery Life n 85 mV Typical Dropout Voltage at IO = 60 mA n 46 µA Typical Quiescent Current at VI = 6 V Less than 1 µA “Sleep” Current n Up to 150 mA Output Current n CMOS-Compatible ON/OFF Control For Power-Up, Standby, or Shutdown n Internal Thermal Protection n Surface-Mount Package

APPLICATIONS

n Cordless and Cellular Telephones n Personal Data Assistants n Personal Communicators n Palmtop Computers Dwg. PS-020 GND RESET COMP OUT ININ ENABLE OUT VR 3 V 4 5 8182 Data Sheet 27468.2 PRELIMINARY INFORMATION DATA SHEET (Subject to change without notice) November 14, 1994 LOW-DROPOUT, 3 V REGULATOR — HIGH EFFICIENCY Always order by complete part number:A8182SL . ABSOLUTE MAXIMUM RATINGS Operating Temperature Range, Junction Temperature, TJ . . . +150°C † Storage Temperature Range, * Output current rating is limited by input voltage, duty cycle, and ambient temperature. Under any set of conditions, do not exceed a junction temp- erature of +150°C. See next page. † Fault conditions that produce excessive junction temperature will activate device thermal shutdown circuitry. These conditions can be tolerated but should be avoided.

LOW-DROPOUT,

115 Northeast Cutoff, Box 15036

Worcester, Massachusetts 01615-0036 (508) 853-5000 MAXIMUM ALLOWABLE OUTPUT CURRENT with device mounted on 2.24" x 2.24" (56.9 mm x 56.9 mm) solder-coated copper-clad board in still air. Maximum Allowable Output Current in Milliamperes with VI = 8 V, TJ = 150°C, Period ≤10 s* dc (Duty Cycle) TA 100% 90% 80% 70% 60% 50% 40% 30% 20% 25°C 150 150 150 150 150 150 150 150 150 50°C 150 150 150 150 150 150 150 150 150 70°C 145 150 150 150 150 150 150 150 150 85°C 120 130 150 150 150 150 150 150 150 *IO = (TJ - TA)/([VI - VO ] RθJA • dc) = (150 - TA)/(5 • 108 • dc) Output current rating can be increased (to 150 mA maximum) by heat sinking or reducing the input voltage. Conditions that produce excessive junction temperature will activate device thermal shutdown circuitry. These conditions can be tolerated but should be avoided. Dwg. FS-012-2 BIAS DRIVE ENABLE THERMAL PROTECT. BANDGAP REF. ERROR AMP IN ENABLE OUT IN OUT7 COMP RESET5 GND4 1.23 V For proper operation, terminals 1 and 8 should be externally connected together, terminals 2 and 7 should be externally connected together. FUNCTIONAL BLOCK DIAGRAM W Copyright © 1994 Allegro MicroSystems, Inc.

LOW-DROPOUT, ELECTRICAL CHARACTERISTICS at TA = +25°C (unless otherwise noted). Limits Characteristic Symbol Test Conditions Min. Typ. Max. Units Output Voltage V O 4 V ≤ VI ≤ 8 V, T A = +25°C 2.95 3.00 3.05 V 10 µA ≤ IO ≤ 100 mA -20 °C ≤ TA ≤ +85°C 2.90 3.00 3.10 V Output Volt. Temp. Coeff. α VO VI = 6 V, IO = 10 mA — — ±0.5 mV/ °C Line Regulation ΔVO(ΔVI) 6 V ≤ VI ≤ 8 V, IO = 1 mA — 7.0 14 mV 4 V ≤ VI ≤ 6 V, IO = 1 mA — 5.5 11 mV Load Regulation ΔVO(ΔIO) 1 mA ≤ IO ≤ 100 mA, VI = 8 V — 12 30 mV 1 mA ≤ IO ≤ 100 mA, VI = 6 V — 11 25 mV 1 mA ≤ IO ≤ 100 mA, VI = 4 V — 8.0 20 mV Dropout Voltage V Imin - VO IO = 60 mA — 85 150 mV IO = 125 mA* — 175 TBD mV Quiescent Current I Q VI = 6 V, 1 mA ≤ IO ≤ 100 mA, VE ≥ 2.0 V — 46 60 µA (GND terminal current) V I = 8 V, 1 mA ≤ IO ≤ 100 mA, VE ≥ 2.0 V — 50 65 µA IQ(off) 4 V ≤ VI ≤ 8 V, VE ≤ 0.8 V — 0.05 1.0 µA ENABLE Input Voltage V EH 4 V ≤ VI ≤ 8 V, Output ON 2.0 — — V VEL -20°C ≤ TA ≤ +85°C Output OFF — — 0.8 V ENABLE Input Current I E TA ≤ +85°C, VE = VI = 8 V — — ±0.1 µA COMP Threshold Voltage V C(t) 4 V ≤ VI ≤ 8 V, VC increasing from 0 1.20 1.23 1.30 V COMP Threshold Volt. TC α VC 4 V ≤ VI ≤ 8 V — — ±0.5 mV/ °C COMP Threshold Hys. V C(hys) 4 V ≤ VI ≤ 8 V 12 34 50 mV COMP Input Current I C 0 V ≤ VC ≤ VO — -25 TBD nA COMP Input Current TC α IC 4 V ≤ VI ≤ 8 V — -0.5 -2.5 nA/ °C RESET Leakage Current I OR VOR = VI = 10 V, TA = +85°C — — 2.0 µA RESET Output Voltage V OR IOR = 500 µA — 100 400 mV Thermal Shutdown Temp. T J 150 — — °C Thermal Resistance R θJA Mounted on 2.24" x 2.24" solder-coated — 108 — °C/W copper-clad board in still air Typical values are at TA = +25°C and are given for circuit design information only. * Pulse test (≤50 ms). See previous page for duty cycle limitations.

LOW-DROPOUT, Worcester, Massachusetts 01615-0036 (508) 853-5000 OUTPUT CURRENT in mA Dwg. GP-052 25 50 100 150 75 T = -20°C

1 V INTERVALS

A 3.04 3.00 3.02 2.98 OUTPUT VOLTAGE in VOLTS 2.96 2.94 3.06 2.92 V = 8 VI 125 V = 4 VI OUTPUT CURRENT in mA Dwg. GP-052-1 25 50 100 150 75 T = 25°C A 3.04 3.00 3.02 2.98 OUTPUT VOLTAGE in VOLTS 2.96 2.94 3.06 2.92 125 V = 8 VI V = 4 VI 2.0 Dwg. GP-053 T = -20°C 50 mA INTERVALS A3.04 3.00 3.02 2.98 OUTPUT VOLTAGE in VOLTS 2.96 2.94 3.06 2.92 I = 0 mAO I = 100 mAO INPUT VOLTAGE in VOLTS 7.0 2.0 Dwg. GP-053-1 T = 25°C 50 mA INTERVALS A3.04 3.00 3.02 2.98 OUTPUT VOLTAGE in VOLTS 2.96 2.94 3.06 2.92 I = 0 mAO I = 100 mAO INPUT VOLTAGE in VOLTS 7.0 CAUTION: Maximum allowable duty cycle will be significantly less than 100% at high temperatures, at high input voltages, or at high output currents. See Maximum Allowable Output Current table. TYPICAL CHARACTERISTICS LOAD REGULATION LINE REGULATION

LOW-DROPOUT, 2.0 Dwg. GP-053-2 T = 85°C 50 mA INTERVALS A 3.04 3.00 3.02 2.98 OUTPUT VOLTAGE in VOLTS 2.96 2.94 3.06 2.92 I = 0 mAO INPUT VOLTAGE in VOLTS 7.0 I = 100 mAO -50 AMBIENT TEMPERATURE in °C Dwg. GP-050 3.01 2.99 0 +50 3.00 +100 2.98 OUTPUT VOLTAGE in VOLTS V = 6 V I = 10 mA I O OUTPUT CURRENT in mA Dwg. GP-052-2 25 50 100 150 75 T = 85°C A 3.04 3.00 3.02 2.98 OUTPUT VOLTAGE in VOLTS 2.96 2.94 3.06 2.92 V = 8 VI 125 V = 4 VI 1.0 Dwg. GP-056-1 2.0 4.03.0 INPUT VOLTAGE in VOLTS 3.0 2.0 2.5 1.5 OUTPUT VOLTAGE in VOLTS 1.0 0.5 3.5 I = 10 mA - 100 mA O T = 25°CA UNDEFINED OUTPUT VOLTAGE CAUTION: Maximum allowable duty cycle will be significantly less than 100% at high temperatures, at high input voltages, or at high output currents. See Maximum Allowable Output Current table. LOAD REGULATION LINE REGULATION TYPICAL CHARACTERISTICS (cont’d)

LOW-DROPOUT, Worcester, Massachusetts 01615-0036 (508) 853-5000 QUIESCENT (GROUND TERMINAL) CURRENT -50 AMBIENT TEMPERATURE in °C Dwg. GP-051 0 +50 +100 QUIESCENT (GROUND TERMINAL) CURRENT in mA V = 6 V I = 10 mA V ‡ 2 V I O E 2.0 Dwg. GP-055 4.0 8.06.0 INPUT VOLTAGE in VOLTS QUIESCENT (GROUND TERMINAL) CURRENT in mA I = 1 – 100 mA O T = 25°CA T = 85°CA T = -20°CA 1.24 Dwg. GP-057 1.26 1.28 COMPARATOR INPUT VOLTAGE in VOLTS 1.22 T = 25°CA T = -20°CA T = 85°CA RESET OUTPUT VOLTAGE in VOLTS V = 6 V I = 10 mA I O DROPOUT VOLTAGE OUTPUT CURRENT in mA Dwg. GP-054 25 50 100 150 75 T = -20°C T = 25°C T = 85°CA A A0.15 0.20 0.10 DROPOUT VOLTAGE in VOLTS0.05 0.25 125 COMPARATOR VOLTAGE CAUTION: Maximum allowable duty cycle will be significantly less than 100% at high temperatures, at high input voltages, or at high output currents. See Maximum Allowable Output Current table. TYPICAL CHARACTERISTICS (cont’d)

LOW-DROPOUT, LOAD TRANSIENT PERFORMANCE ENABLE TRANSIENT PERFORMANCE VI = 3.2 V to 6.2 V, CO = 1 µF, IO = 60 mA, TA = 25°CVI = 3.2 V to 6.2 V, CO = 1 µF, TA = 25°C Dwg. WP-026 VO IO 100 mA 1 mA 3.5 V 3.0 V 2.5 V <100 ms <300 ms Dwg. WP-027 VO VE 3.0 V <125 ms <250 ms V I The RESET output of the comparator pro- duces a logic low whenever the COMP input is below 1.23 V. An out-of-regulation detector can be configured by dividing down the regulator output (an R/R divider is typical) and connecting it to the COMP input. As tne regulator input is ramped up, the RESET signal becomes valid (low) at approximately V I = 1.3 V. The RESET signal will go high when VC = 1.23 V (VO = 2.46 V with an R/R divider). Comparator hysteresis prevents oscillations under low battery conditions. The RESET open-drain output requires an external pull-up resistor. This can be returned to either the input supply or the regulator output, depending on suystem requirements. Note that the RESET sink current is adds to the battery drain in a low-battery condition. Suggested values range from 100 kΩ to 1 MΩ . RESET should be left unconnected if it is not used. INPUT, COMPARATOR, & OUTPUT RELATIONSHIPS *Comparator input voltage is normally obtained from a resistive divider off of the output. 10 V MAX. 1.23 V V V V * 1.3 V 3.0 V V Dwg. WP-025 C(hys) OUTPUT UNDEFINED I O C OR V TYPICAL CHARACTERISTICS (concluded)

LOW-DROPOUT, Worcester, Massachusetts 01615-0036 (508) 853-5000 NOTES: 1. Lead spacing tolerance is non-cumulative. 2. Exact body and lead configuration at vendor’s option within limits shown. Dimensions in Inches (Based on 1 mm = 0.03937”) Dimensions in Millimeters 0° TO 8° 0.1968 0.1890 0.2440 0.2284 0.050 0.016 Dwg. MA-007-8 in 0.050 BSC 0.0098 0.0075 0.1574 0.14970.020 0.013 0.0688 0.0532 0.0040 MIN. 0° TO 8° 5.00 4.80 6.20 5.80 1.27 0.40 Dwg. MA-007-8 mm 1.27 BSC 0.25 0.19 4.00 3.800.51 0.33 1.75 1.35 0.10 MIN. Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the design of its products. Components made under military approvals will be in accordance with the approval requirements. The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for its use; nor for any infringements of patents or other rights of third parties which may result from its use.