SL74LV373 SLS

Document overview

  • Manufacturer or author: Provided By digicamel.com
  • PDF pages: 8

Technical content

OCTAL D-TYPE TRANSPARENT LATCH (3-State) SL74LV373 are compatible by pinning with SL74HC373 and SL74HCT373 series. Input voltage levels are compatible with standard CMOS levels.

  • Output voltage levels are compatible with input levels of CMOS, NMOS and TTL ICS
  • Voltage supply range: 2.0 to 3.2 V
  • LOW input current: 1.0 µÀ; 0.1 µÀ at Ò = 25 °Ñ
  • Input current LOW/HIGH: 8 mÀ
  • Latch current: not less than 150 mÀ at Ò = 125 °Ñ
  • ESD acceptable value: not less than 2000 V as per HBM and not less than 200 V as per MM

ORDERING INFORMATION

TA = -40° to 125° C for all packages PIN ASSIGNMENT 373 OE 01 Q0 02 D0 03 D1 04 Q1 05 Q2 06 D2 07 D3 08 Q3 09 GND 10 LE VCC FUNCTION TABLE Inputs Output OE LE Dn Qn L H H H L H L L L L X no change H X X Z BLOCK DIAGRAM OE 02D0 06D2 1918 17 16 1514 13 12 D6 Q6 Q5D5 D4 Q4 LE Pin 20=VCC Pin 10 = GND

ABSOLUTE MAXIMUM RATINGS* Symbol Parameter Rating Unit VCC Supply voltage -0.5 to +5.0 V IIK *1 Input diode current ±20 mÀ IOK *2 Output diode current ±50 mÀ IO *3 Output source or sink current ±35 mÀ ICC VCC current ±70 mÀ IGND GND current ±70 mÀ PD Power dissipation per package: Plastic DIP * 4 SOIC *4 750 500 mW Tstg Storage temperature range -65 to +150 °C * In absolute maximum ratings modes functioning is not guaranteed. Upon lifting the absolute maximum ratings functioning is guarateed at the recommended operatng conditions. *1 Provided VI < -0.5 V or VI > VCC + 0.5 V. *2 Provided VO < -0.5 V or VO > VCC + 0.5 V. *3 Provided -0.5 V < V O < VCC + 0.5 V. *4 When operating in the temperature range of 70°Ñ to 125 °C power dissipation value decreses: - for Plastic DIP by 1 2 mW/°C - for SOIC by 8 mW/°C RECOMMENDED OPERAING CONDITIONS Symbol Parameter Min Max Unit VCC Supply voltage 1.2 3.6 V VIN Input voltage 0 VCC V VOUT Output voltage 0 VCC V TA Operating ambient temperature range. For all types of packages -40 125 °C tLH, tHL Input rise and fall times VCC =1.2 V VCC =2.0 V VCC =3.0 V VCC =3.6 V 0 1000 700 500 400 ns

Test VCC, Limits Symbol Parameter conditions V 25°C -40°C to 85°C 125°C Unit min max min max min max VIH HIGH level voltage VO = VCC-0.1 V 1.2 2.0 3.0 3.6 0.9 1.4 2.1 2.5 0.9 1.4 2.1 2.5 0.9 1.4 2.1 2.5 V VIL LOW level voltage VO =0.1 V 1.2 2.0 3.0 3.6 0.3 0.6 0.9 1.1 0.3 0.6 0.9 1.1 0.3 0.6 0.9 1.1 V VOH HIGH level output voltage VI = VIH or VIL IO = -50 µÀ 1.2 2.0 3.0 3.6 1.1 1.92 2.92 3.52 1.0 1.9 2.9 3.5 1.0 1.9 2.9 3.5 V VI = VIH or VIL IO = -8 mÀ VOL LOW level output voltage VI = VIH or VIL IO = 50 µÀ 1.2 2.0 3.0 3.6 0.09 0.09 0.09 0.09 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 V VI = VIH or VIL IO = 8 mÀ II Input current VI = VCC or 0 V 3.6 - ±0.1 - ±1.0 - ±1.0 µÀ IOZ OFF-state output current 3-state outputs VI = VIL or VIH VO =VCC or 0 V ICC Supply current VI =VCC or 0 V IO = 0 µÀ 3.6 - 8.0 - 80 - 160 µÀ

coordinates (counted from lower left corner), mm Pad number X Y Pad size, mm 01 0.142 0.628 0.108 x 0.108 02 0.142 0.377 0.108 x 0.108 03 0.142 0.125 0.108 x 0.108 04 0.498 0.125 0.108 x 0.108 05 0.693 0.125 0.108 x 0.108 06 0.871 0.125 0.108 x 0.108 07 1.095 0.125 0.108 x 0.108 08 1.423 0.130 0.108 x 0.108 09 1.423 0.329 0.108 x 0.108 10 1.423 0.587 0.108 x 0.108 11 1.423 0.949 0.108 x 0.108 12 1.423 1.198 0.108 x 0.108 13 1.423 1.447 0.108 x 0.108 14 1.085 1.447 0.108 x 0.108 15 0.868 1.447 0.108 x 0.108 16 0.696 1.447 0.108 x 0.108 17 0.461 1.447 0.108 x 0.108 18 0.142 1.447 0.108 x 0.108 3 4 5 6 7 8 131415161718 1.66 mm 1.68 mm 74LV373/374 On-chip marking

19 0.142 1.245 0.108 x 0.108 20 0.142 0.997 0.108 x 0.108