74LS76 ETC
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DESCRIPTION The T4LS76 a 2 negative edge triggered i H ‘The "76" is a Dual JK Flip-Flop with individ- —ip-Rop. The J and K inputs must be stable ual J. K, Clock, Set and Reset inputs, The ly one setup time prior to the HIGH-to- | * ms iad 7476 and 74H76 are positive pulse triggerac LOW Clock transition. ip-flops. JK information is loaded into 1h The Set Bo) anc Reset | eayneh Pies q master while the Clock is HIGH ang trans- Lien yrd eas hte pte 7 ferred to the siave on the HIGH-o-LOW override the Clock and cata puts forcing Clock transition, The Jang K inputs must be qutouns steady state levele ” “n ” stable while the Clock is HIGH for conven oa eres = = bonal operation ORDERING CODE (See Section 9 tor turther Package and Ordering Information) COMMERCIAL RANGES MILITARY RANGES Vee SVEN Tas Cm -mRC | Noes HT KT, -SFC IS werrne PIN CONFIGURATION SS476F | SS4M7EF SsaLs7er Sse7EW +) SSAHTEW ssais7ew 30 om INPUT AND OUTPUT LOADING AND FAN-OUT TABLE! ean te ee EE ee oa vel] a: in zoom eels) s | [&]| s3 Be A he (eal 80 100 Tm Ad Figure A [ie swnon wna | Se | so | | oe | te AD wom mw] te | a | | | 3S Tow (AD ~500 asdowm Smal we | | | tm | DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE”) [rer conorons ef enree f ees f eeee onr [tanner | [Min [max | atin [eta [iin | Max | min | Max | sores 8 The peered sroen nocane atterere parametre vanes for Mitary/Corrrerce! teroertiore engen sipectoe'y 2 For famey dc charecterates, see mace (Ort Gown! tor §4/74 and SOU74H and wee ruc beck cover for 748 and Sa. 8774.5 spectator 4 ‘sSqyactics
LOGIC DIAGRAM MODE SELECT—TRUTH TABLE | croumencot Teeiorels[el 38 jOuTPUTS) OPERATING MODE [So] RoleF ia] s]x/ o | a | ‘Asynchronous Set H] x # Asynchronous Reset (Clear) cis L Undetermined ici a RE ¥ e s Toggle him a Lond “0” (Reset 4] om L Load "1* (Set! Hq) sm ” Ky y| | Hold “no change” Him Cl] A = HGH vonage sev snoy stain . ‘ L = COW vomtage lever sieney state, Ph = GI vortage tees! one setup tree prior to Me HIGH-t-LOW Ciccs Wrenmton “* 8 (OW votage tess! ore setup tne prior to the MIGE-te-LOW Clock raramen “* 8 = Lomerentn tier ines sit of ha etrenced cpl porta a HOHte LOW Clock aration A = Powe Clock sume AC CHARACTERISTICS T, = 25°C (See Section 4 for Wavelorms and Conditions) Cy = 15 pF CL 15pF Ay = 40011 AL ake z frequency wu Propagation delay tom ‘Clock to Output oH delay Be Kefwawn | vemos | TS] tal | | [sts] AC SETUP REQUIREMENTS 1, = 25°C (See Section 4 for Wavetorms and Conditions) ee ie sere sae eee min [max | ain | Max | iin | tax | iin | Max | twin C1 pulse width HIGHO Clock pulse fe] [#{ [ [ fel [| ‘Set or Reset pure [we sasdomnnr | wenems Te [ [ol [| fal [el sites in| |] J.0° K to Clock
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€ Both cunpute wit te HIGH whnte beth fo and Ao are LOW, but thw curput states are wrpresicume # fo ard Ro go GH emutmreouey The PALS w ncge ing gared Cat mat be staben cre satu time price othe nagatnn Onge oF INe Choes tor Credcratre COR EhOr © The J eve © mrpuns of ihe 7478 one F478 rruat be slabie whole the Cinch 6 HIGH tor eereestional operator syqnetics 115