74HCT73

74HC73 PHILIPS

Document overview

• PDF pages: 21

Technical content

Page 1

1. General description

The 74HC73 is a high-speed Si-gate CMOS device and is pin compatible with low-power Schottky TTL (LSTTL). The 74HC73 is specified in compliance with JEDEC standard no. 7A.

The 74HC is a dual negative-edge triggered JK flip-flop featuring individual J, K, clock (nCP) and reset (nR) inputs; also complementary nQ and nQ outputs.

The J and K inputs must be stable one set-up time prior to the HIGH-to-LOW clock transition for predictable operation.

The reset (nR) is an asynchronous active LOW input. When LOW, it overrides the clock and data inputs, forcing the nQ output LOW and the nQ output HIGH.

Schmitt-trigger action in the clock input makes the circuit highly tolerant to slower clock rise and fall times.

2. Features

I Low-power dissipation I Complies with JEDEC standard no. 7A I ESD protection: N HBM EIA/JESD22-A114-B exceeds 2000 V N MM EIA/JESD22-A115-A exceeds 200 V. I Multiple package options I Specified from −40 °C to +80 °C and from −40 °C to +125 °C.

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3. Quick reference data

Table 1: Quick reference data GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns. Symbol

Parameter

tPHL, tPLH

propagation delay nCP to nQ nCP to nQ nR to nQ, nQ maximum clock

fmax

frequency input capacitance

CI

power dissipation

CPD

capacitance per flip-flop

Conditions

Min Typ

Max Unit

CL = 15 pF; VCC = 5 V

-

-

• 16 - ns
• 16 - ns
• 15 - ns

CL = 15 pF; VCC = 5 V

• 77 - MHz
• 3.5 - pF

[1] -

VI = GND to VCC

30 - pF

[1] CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi × N + ∑(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; ∑(CL × VCC2 × fo) = sum of outputs.

4. Ordering information

Table 2: Ordering information

plastic dual in-line package; 14 leads (300 mil)

74HC73N

−40 °C to +125 °C DIP14

SOT27-1

plastic small outline package; 14 leads; body width 3.9 mm

74HC73D

−40 °C to +125 °C SO14

SOT108-1

−40 °C to +125 °C SSOP14 plastic shrink small outline package; 14 leads; body width

74HC73DB

SOT337-1

5.3 mm

−40 °C to +125 °C TSSOP14 plastic thin shrink small outline package; 14 leads; body

74HC73PW

SOT402-1

width 4.4 mm

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5. Functional diagram

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Page 4

6. Pinning information

6.1 Pinning

6.2 Pin description

Table 3: Pin description Symbol

Pin

1CP

1

1R

2

1K

3 4

VCC 2CP

5

2R

6

2J

7

2Q

8

2Q

9

2K

Description

clock input for flip-flop 1 (HIGH-to-LOW, edge-triggered) asynchronous reset input for flip-flop 1 (active LOW) synchronous K input for flip-flop 1 positive supply voltage clock input for flip-flop 2 (HIGH-to-LOW, edge-triggered) asynchronous reset input for flip-flop 2 (active LOW) synchronous J input for flip-flop 2 complement flip-flop 2 output true flip-flop 2 output synchronous K input for flip-flop 2

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Page 5

Table 3: Pin description …continued Symbol

Pin

GND

11

1Q

12

1Q

13

1J

14

7. Functional description

7.1 Function table

Table 4: Function table [1]

Description

ground (0 V) true flip-flop 1 output complement flip-flop 1 output synchronous J input for flip-flop 1

L

X

X

X

L

H

asynchronous reset

q

q

toggle

H

h

h

↓

l

h

L

H

load 0 (reset)

h

l

H

L

load 1 (set)

q

hold (no change)

l

l

q

[1] H = HIGH voltage level; h = HIGH voltage level one set-up time prior to the HIGH-to-LOW CP transition; L = LOW voltage level; I = LOW voltage level one set-up time prior to the HIGH-to-LOW CP transition; q = state of referenced output one set-up time prior to the HIGH-to-LOW CP transition; X = don’t care; ↓ = HIGH-to-LOW CP transition.

8. Limiting values

Table 5: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter supply voltage VCC input diode current IIK output diode current IOK output source or sink IO current ICC, IGND VCC or GND current storage temperature Tstg power dissipation Ptot

DIP14 package SO14, SSOP14 and TSSOP14 packages

Conditions

Min Max Unit −0.5 +7

V

VI < −0.5 V or VI > VCC + 0.5 V

• ±20 mA

VO < −0.5 V or VO > VCC + 0.5 V

• ±20 mA

VO = −0.5 V to VCC + 0.5 V

• ±25 mA
• ±50 mA −65 +150 °C

[1] - 750 mW [2] - 500 mW

[1] Above 70 °C: Ptot derates linearly with 12 mW/K. [2] Above 70 °C: Ptot derates linearly with 8 mW/K.

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9. Recommended operating conditions

Table 6: Recommended operating conditions Symbol Parameter

Conditions

Min Typ Max Unit

supply voltage

2.0 5.0 6.0 V

VCC input voltage

0 - VCC V

VI

output voltage

0 - VCC V

VO tr, tf input rise and fall

VCC = 2.0 V

• - 1000 ns

times except for

VCC = 4.5 V

• 6.0 500 ns

nCP

VCC = 6.0 V

• - 400 ns

ambient

−40 - +125 °C

Tamb temperature

10. Static characteristics

Table 7: Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter

Conditions

Min Typ Max Unit

Tamb = 25 °C HIGH-level input voltage

VCC = 2.0 V

1.5 1.2 - V

VIH

VCC = 4.5 V

3.15 2.4

• V

VCC = 6.0 V

4.2 3.2 - V

LOW-level input voltage

VCC = 2.0 V

• 0.8 0.5 V

VIL

VCC = 4.5 V

• 2.1 1.35 V

VCC = 6.0 V

• 2.8 1.8 V

HIGH-level output voltage

VI = VIH or VIL

VOH

IO = −20 µA; VCC = 2.0 V

1.9 2.0 - V

IO = −20 µA; VCC = 4.5 V

4.4 4.5 - V

IO = −20 µA; VCC = 6.0 V

5.9 6.0 - V

IO = −4 mA; VCC = 4.5 V

3.98 4.32 -

V

IO = −5.2 mA; VCC = 6.0 V

5.48 5.81 -

V

LOW-level output voltage

VI = VIH or VIL

VOL

IO = 20 µA; VCC = 2.0 V

• 0 0.1 V

IO = 20 µA; VCC = 4.5 V

• 0 0.1 V

IO = 20 µA; VCC = 6.0 V

• 0 0.1 V

IO = 4 mA; VCC = 4.5 V

• 0.15 0.26 V

IO = 5.2 mA; VCC = 6.0 V

• 0.16 0.26 V

input leakage current

VI = VCC or GND; VCC = 6.0 V

• - ±0.1 µA

ILI quiescent supply current

VI = VCC or GND; IO = 0 A; VCC = 6.0 V

• - 4.0 µA

ICC input capacitance

• 3.5 - pF

CI

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Page 7

Table 7: Static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter

Conditions

Min Typ Max Unit

Tamb = −40 °C to +85 °C HIGH-level input voltage

VCC = 2.0 V

1.5 - - V

VIH

VCC = 4.5 V

3.15 -

• V

VCC = 6.0 V

4.2 - - V

LOW-level input voltage

VCC = 2.0 V

• - 0.5 V

VIL

VCC = 4.5 V

• - 1.35 V

VCC = 6.0 V

• - 1.8 V

HIGH-level output voltage

VI = VIH or VIL

VOH

IO = −20 µA; VCC = 2.0 V

1.9 - - V

IO = −20 µA; VCC = 4.5 V

4.4 - - V

IO = −20 µA; VCC = 6.0 V

5.9 - - V

IO = −4 mA; VCC = 4.5 V

3.84 -

• V

IO = −5.2 mA; VCC = 6.0 V

5.34 -

• V

LOW-level output voltage

VI = VIH or VIL

VOL

IO = 20 µA; VCC = 2.0 V

• - 0.1 V

IO = 20 µA; VCC = 4.5 V

• - 0.1 V

IO = 20 µA; VCC = 6.0 V

• - 0.1 V

IO = 4 mA; VCC = 4.5 V

• - 0.33 V

IO = 5.2 mA; VCC = 6.0 V

• - 0.33 V

input leakage current

VI = VCC or GND; VCC = 6.0 V

• - ±1.0 µA

ILI quiescent supply current

VI = VCC or GND; IO = 0 A; VCC = 6.0 V

• - 40.0 µA

ICC

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Page 8

Table 7: Static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter

Conditions

Min Typ Max Unit

Tamb = −40 °C to +125 °C HIGH-level input voltage

VCC = 2.0 V

1.5 - - V

VIH

VCC = 4.5 V

3.15 -

• V

VCC = 6.0 V

4.2 - - V

LOW-level input voltage

VCC = 2.0 V

• - 0.5 V

VIL

VCC = 4.5 V

• - 1.35 V

VCC = 6.0 V

• - 1.8 V

HIGH-level output voltage

VI = VIH or VIL

VOH

IO = −20 µA; VCC = 2.0 V

1.9 - - V

IO = −20 µA; VCC = 4.5 V

4.4 - - V

IO = −20 µA; VCC = 6.0 V

5.9 - - V

IO = −4 mA; VCC = 4.5 V

3.7 - - V

IO = −5.2 mA; VCC = 6.0 V

5.2 - - V

LOW-level output voltage

VI = VIH or VIL

VOL

IO = 20 µA; VCC = 2.0 V

• - 0.1 V

IO = 20 µA; VCC = 4.5 V

• - 0.1 V

IO = 20 µA; VCC = 6.0 V

• - 0.1 V

IO = 4 mA; VCC = 4.5 V

• - 0.4 V

IO = 5.2 mA; VCC = 6.0 V

• - 0.4 V

input leakage current

VI = VCC or GND; VCC = 6.0 V

• - ±1.0 µA

ILI quiescent supply current

VI = VCC or GND; IO = 0 A; VCC = 6.0 V

• - 80.0 µA

ICC

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11. Dynamic characteristics

Table 8: Dynamic characteristics GND = 0 V; tr = tf = 6 ns; CL = 50 pF; see Figure 8. Symbol Parameter

Conditions

Min Typ Max Unit

Tamb = 25 °C tPHL, tPLH propagation delay nCP to nQ

see Figure 6 VCC = 2.0 V

• 52 160 ns

VCC = 4.5 V

• 19 32 ns

VCC = 6.0 V

• 15 27 ns

VCC = 5.0 V; CL = 15 pF

• 16 - ns

propagation delay nCP to nQ

see Figure 6 VCC = 2.0 V

• 52 160 ns

VCC = 4.5 V

• 19 32 ns

VCC = 6.0 V

• 15 27 ns

VCC = 5.0 V; CL = 15 pF

• 16 - ns

propagation delay nR to nQ, nQ

see Figure 7 VCC = 2.0 V

• 50 145 ns

VCC = 4.5 V

• 18 29 ns

VCC = 6.0 V

• 14 25 ns

VCC = 5.0 V; CL = 15 pF

• 15 - ns

tTHL, tTLH output transition time

see Figure 6 VCC = 2.0 V

• 19 75 ns

VCC = 4.5 V

• 7 15 ns

VCC = 6.0 V

• 6 13 ns

nCP clock pulse width HIGH or LOW see Figure 6 tW

VCC = 2.0 V

80 22 - ns

VCC = 4.5 V

16 8 - ns

VCC = 6.0 V

14 6 - ns

nR reset pulse width HIGH or LOW see Figure 7

VCC = 2.0 V

80 22 - ns

VCC = 4.5 V

16 8 - ns

VCC = 6.0 V

14 6 - ns

removal time nR to nCP

see Figure 7

trem

VCC = 2.0 V

80 22 - ns

VCC = 4.5 V

16 8 - ns

VCC = 6.0 V

14 6 - ns

set-up time nJ, nK to nCP

see Figure 6

tsu

VCC = 2.0 V

80 22 - ns

VCC = 4.5 V

16 8 - ns

VCC = 6.0 V

14 6 - ns

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Page 10

Table 8: Dynamic characteristics …continued GND = 0 V; tr = tf = 6 ns; CL = 50 pF; see Figure 8. Symbol Parameter

Conditions

Min Typ Max Unit

th hold time nJ, nK to nCP

see Figure 6 VCC = 2.0 V

3 −8 - ns

VCC = 4.5 V

3 −3 - ns

VCC = 6.0 V

3 −2 - ns

maximum clock frequency

see Figure 6

fmax

VCC = 2.0 V

6.0 23 - MHz

VCC = 4.5 V

30 70 - MHz

VCC = 6.0 V

35 83 - MHz

VCC = 5.0 V; CL = 15 pF

• 77 - MHz

[1] -

power dissipation capacitance per

VI = GND to VCC

30 - pF

CPD flip-flop Tamb = −40 °C to +85 °C tPHL, tPLH propagation delay nCP to nQ

see Figure 6 VCC = 2.0 V

• - 200 ns

VCC = 4.5 V

• - 40 ns

VCC = 6.0 V

• - 34 ns

propagation delay nCP to nQ

see Figure 6 VCC = 2.0 V

• - 200 ns

VCC = 4.5 V

• - 40 ns

VCC = 6.0 V

• - 34 ns

propagation delay nR to nQ, nQ

see Figure 7 VCC = 2.0 V

• - 180 ns

VCC = 4.5 V

• - 36 ns

VCC = 6.0 V

• - 31 ns

tTHL, tTLH output transition time

see Figure 6 VCC = 2.0 V

• - 95 ns

VCC = 4.5 V

• - 19 ns

VCC = 6.0 V

• - 16 ns

nCP clock pulse width HIGH or LOW see Figure 6 tW

VCC = 2.0 V

100 - - ns

VCC = 4.5 V

20 - - ns

VCC = 6.0 V

17 - - ns

nR reset pulse width HIGH or LOW see Figure 7

VCC = 2.0 V

100 - - ns

VCC = 4.5 V

20 - - ns

VCC = 6.0 V

17 - - ns

removal time nR to nCP

see Figure 7

trem

VCC = 2.0 V

100 - - ns

VCC = 4.5 V

20 - - ns

VCC = 6.0 V

17 - - ns

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Table 8: Dynamic characteristics …continued GND = 0 V; tr = tf = 6 ns; CL = 50 pF; see Figure 8. Symbol Parameter

Conditions

Min Typ Max Unit

tsu set-up time nJ, nK to nCP

see Figure 6 VCC = 2.0 V

100 - - ns

VCC = 4.5 V

20 - - ns

VCC = 6.0 V

17 - - ns

hold time nJ, nK to nCP

see Figure 6

th

VCC = 2.0 V

3 - - ns

VCC = 4.5 V

3 - - ns

VCC = 6.0 V

3 - - ns

maximum clock frequency

see Figure 6

fmax

VCC = 2.0 V

4.8 - - MHz

VCC = 4.5 V

24 - - MHz

VCC = 6.0 V

28 - - MHz

Tamb = −40 °C to +125 °C tPHL, tPLH propagation delay nCP to nQ

see Figure 6 VCC = 2.0 V

• - 240 ns

VCC = 4.5 V

• - 48 ns

VCC = 6.0 V

• - 41 ns

propagation delay nCP to nQ

see Figure 6 VCC = 2.0 V

• - 240 ns

VCC = 4.5 V

• - 48 ns

VCC = 6.0 V

• - 41 ns

propagation delay nR to nQ, nQ

see Figure 7 VCC = 2.0 V

• - 220 ns

VCC = 4.5 V

• - 44 ns

VCC = 6.0 V

• - 38 ns

tTHL, tTLH output transition time

see Figure 6 VCC = 2.0 V

• - 110 ns

VCC = 4.5 V

• - 22 ns

VCC = 6.0 V

• - 19 ns

nCP clock pulse width HIGH or LOW see Figure 6 tW

VCC = 2.0 V

120 - - ns

VCC = 4.5 V

24 - - ns

VCC = 6.0 V

20 - - ns

nR reset pulse width HIGH or LOW see Figure 7

VCC = 2.0 V

120 - - ns

VCC = 4.5 V

24 - - ns

VCC = 6.0 V

20 - - ns

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Page 12

Table 8: Dynamic characteristics …continued GND = 0 V; tr = tf = 6 ns; CL = 50 pF; see Figure 8. Symbol Parameter

Conditions

Min Typ Max Unit

trem removal time nR to nCP

see Figure 7 VCC = 2.0 V

120 - - ns

VCC = 4.5 V

24 - - ns

VCC = 6.0 V

20 - - ns

set-up time nJ, nK to nCP

see Figure 6

tsu

VCC = 2.0 V

120 - - ns

VCC = 4.5 V

24 - - ns

VCC = 6.0 V

20 - - ns

hold time nJ, nK to nCP

see Figure 6

th

VCC = 2.0 V

3 - - ns

VCC = 4.5 V

3 - - ns

VCC = 6.0 V

3 - - ns

maximum clock frequency

see Figure 6

fmax

VCC = 2.0 V

4.0 - - MHz

VCC = 4.5 V

20 - - MHz

VCC = 6.0 V

24 - - MHz

[1] CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi × N + ∑(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; ∑(CL × VCC2 × fo) = sum of outputs.

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12. Waveforms

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Page 14

Table 9: Test data

2.0 V

VCC

6 ns

50 pF

6 ns

50 pF

4.5 V

VCC

6 ns

50 pF

6.0 V

VCC

6 ns

15 pF

5.0 V

VCC

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13. Package outline

DIP14: plastic dual in-line package; 14 leads (300 mil)

SOT27-1

Note 1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.

Fig 9. Package outline SOT27-1 (DIP14)

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SO14: plastic small outline package; 14 leads; body width 3.9 mm

SOT108-1

Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.

Fig 10. Package outline SOT108-1 (SO14)

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SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm

SOT337-1

Fig 11. Package outline SOT337-1 (SSOP14)

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TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm

SOT402-1

Fig 12. Package outline SOT402-1 (TSSOP14)

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14. Revision history

Table 10: Revision history Document ID

Release

Data sheet status

Change notice Doc. number

Supersedes

date

74HC73_3

20041112

-

74HC_HCT73_CNV_2

• The format of this data sheet has been redesigned to comply with the current presentation

Modifications:

and information standard of Philips Semiconductors.

• Removed type number 74HCT73.
• Inserted family specification.

74HC_HCT73_CNV_2 19970911 Product specification -

-

74HC_HCT73_1

74HC_HCT73_1

19901201 Product specification -

-

-

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15. Data sheet status

Level Data sheet status [1] Product status [2] [3] Definition

This data sheet contains data from the objective specification for product development. Philips

I Objective data

Development

Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published

II Preliminary data

Qualification

at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the

III Product data

Production

right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN).

[1] Please consult the most recently issued data sheet before initiating or completing a design. [2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. [3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.

16. Definitions

Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.

18. Contact information

17. Disclaimers

Life support — These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’),

relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.

For additional information, please visit: http://www.semiconductors.philips.com For sales office addresses, send an email to: sales.addresses@www.semiconductors.philips.com

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19. Contents

1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2 4 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 3 6 Pinning information. . . . . . . . . . . . . . . . . . . . . . 4 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 7 Functional description . . . . . . . . . . . . . . . . . . . 5 7.1 Function table . . . . . . . . . . . . . . . . . . . . . . . . . . 5

8 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5 9 Recommended operating conditions. . . . . . . . 6 10 Static characteristics. . . . . . . . . . . . . . . . . . . . . 6 11 Dynamic characteristics . . . . . . . . . . . . . . . . . . 9 12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 13 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 15 14 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 19 15 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 20 16 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 17 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

18 Contact information . . . . . . . . . . . . . . . . . . . . 20

© Koninklijke Philips Electronics N.V. 2004 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.

Date of release: 12 November 2004 Document number: 9397 750 13815

Published in The Netherlands