74HCT7273

74HCT7273 PHILIPS

Document overview

• PDF pages: 20

Technical content

Page 1

INTEGRATED CIRCUITS

Page 2

FEATURES

DESCRIPTION

The 74HCT7273 is a high-speed SI-gate CMOS device and is pin compatible

• ESD protection:

with Low power Schottky TTL (LSTTL). It is specified in compliance with

HBM EIA/JESD22-A114-A Exceeds 2000 V

JEDEC standard no 7A.

MM EIA/JESD22-A115-A

The 74HCT7273 has eight edge-triggered D-type flip-flops with individual D

Exceeds 200 V

inputs and Q outputs. The common Clock (CP) and Master Reset (MR) inputs

• Ideal buffer for MOS

load and reset (clear) all flip-flops simultaneously.

microprocessor or memory

The state of each D input, one set-up time before the LOW-to-HIGH clock

• Eight positive edge-triggered

transition, is transferred to the corresponding output (Qn) of the flip-flop.

D-type flip-flops

A LOW level on the MR input forces all outputs LOW, independently of the clock

• Common clock and master reset

or data inputs.

• Output capability: standard (open

The device is useful for applications requiring true outputs only and clock and

drain)

master reset inputs that are common to all storage elements.

• ICC category: MSI.

The 74HCT7273 has open-drain N-outputs, which are clamped by a diode connected to VCC. When a HIGH is clocked in the flip-flop, the output comes in the high-impedance OFF-state. The output may now be pulled to any voltage between GND and VOmax. This allows the device to be used as a LOW-to-HIGH or HIGH-to-LOW level shifter. For digital operation and OR-tied output applications, the device must have a pull-up resistor to establish a logic HIGH level.

QUICK REFERENCE DATA

Ground = 0 V; Tamb = 25 °C; tr = tf = 6.0 ns.

Notes 1. CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) + ∑(V02/RL) × duty factor LOW where: fi = input frequency in MHz; fo = output frequency in MHz; ∑ (CL × VCC2 × fo) = sum of outputs; CL = output load capacitance in pF; RL = pull-up resistor in MΩ; VCC = supply voltage in Volts. 2. The condition is VI = GND to VCC − 1.5 V.

Page 3

FUNCTION TABLE

See note 1.

Note 1. H = HIGH voltage level; h = HIGH voltage level one set-up time prior to the LOW-to-HIGH CP transition; L = LOW voltage level. l = LOW voltage level one set-up time prior to the LOW-to-HIGH CP transition; Z = high-impedance OFF-state; X = don’t care; ↑ = LOW-to-HIGH CP transition.

ORDERING INFORMATION

Page 4

PINNING

Page 5

11

1

Page 6

Page 7

RECOMMENDED OPERATING CONDITIONS

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134); voltages are referenced to GND (ground = 0 V).

Note 1. For DIP package: above 70 °C the value of PD derates linearly with 12 mW/K. 2. For SO package: above 70 °C the value of PD derates linearly with 8 mW/K.

Page 8

DC CHARACTERISTICS

Over recommended operating conditions; voltages are referenced to GND (ground = 0 V).

Note 1. The value off additional quiescent supply current (∆ICC) for a unit load of 1 is given in the specifications. To determine ∆ICC per input, multiply this value by the unit load coefficient shown in Table 1.

Table 1

Page 9

AC CHARACTERISTICS

Ground = 0 V; tr = tf ≤ 6.0 ns; CL = 50 pF.

Page 10

AC WAVEFORMS

Page 11

Fig.9 Load circuit for switching times.

Page 12

PACKAGE OUTLINES

SO20: plastic small outline package; 20 leads; body width 7.5 mm

SOT163-1

Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.

Page 13

DIP20: plastic dual in-line package; 20 leads (300 mil)

SOT146-1

Page 14

SOLDERING

Introduction to soldering surface mount packages This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “Data Handbook IC26; Integrated Circuit Packages” (document order number 9398 652 90011). There is no soldering method that is ideal for all surface mount IC packages. Wave soldering is not always suitable for surface mount ICs, or for printed-circuit boards with high population densities. In these situations reflow soldering is often used.

Reflow soldering Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. Typical reflow peak temperatures range from 215 to 250 °C. The top-surface temperature of the packages should preferable be kept below 230 °C.

Wave soldering Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. To overcome these problems the double-wave soldering method was specifically developed.

If wave soldering is used the following conditions must be observed for optimal results:

• Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave.
• For packages with leads on two sides and a pitch (e): – larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board;

– smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end.

• For packages with leads on four sides, the footprint must be placed at a 45° angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners.

During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical dwell time is 4 seconds at 250 °C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications.

Manual soldering Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C.

Page 15

Suitability of surface mount IC packages for wave and reflow soldering methods

Notes 1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”. 2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).

1. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.

Introduction to soldering through-hole mount packages This text gives a brief insight to wave, dip and manual soldering. A more in-depth account of soldering ICs can be found in our “Data Handbook IC26; Integrated Circuit Packages” (document order number 9398 652 90011). Wave soldering is the preferred method for mounting of through-hole mount IC packages on a printed-circuit board.

Soldering by dipping or by solder wave The maximum permissible temperature of the solder is 260 °C; solder at this temperature must not be in contact with the joints for more than 5 seconds. The total contact time of successive solder waves must not exceed 5 seconds. The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (Tstg(max)). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit.

Manual soldering Apply the soldering iron (24 V or less) to the lead(s) of the package, either below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 °C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 °C, contact may be up to 5 seconds.

Page 16

Suitability of through-hole mount IC packages for dipping and wave soldering methods

Note 1. For SDIP packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit board.

DEFINITIONS

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.

Page 17

NOTES

Page 18

NOTES

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NOTES

Page 20

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© Philips Electronics N.V. 1999

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SCA68

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Printed in The Netherlands

245002/01/pp20

Date of release: 1999 Oct 01

Document order number: 9397 750 05733