Download PDF74HC643 PHILIPS
Document overview
- PDF pages: 6
Technical content
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FEATURES
- Octal bidirectional bus interface
- True and inverting 3-state outputs
- Output capability: bus driver
- ICC category: MSI
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns
GENERAL DESCRIPTION
The 74HC/HCT643 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT643 are octal transceivers featuring true and inverting 3-state bus compatible outputs in both send and receive directions. The “643” features an output enable (OE) input for easy cascading and a send/receive (DIR) for direction control. OE controls the outputs so that the buses are effectively isolated.
Notes 1. CPD is used to determine the dynamic power dissipation (PD in µW): PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where: fi = input frequency in MHz fo = output frequency in MHz ∑ (CL × VCC2 × fo) = sum of outputs CL = output load capacitance in pF VCC = supply voltage in V 2. For HC the condition is VI = GND to VCC For HCT the condition is VI = GND to VCC −1.5 V
ORDERING INFORMATION
See “74HC/HCT/HCU/HCMOS Logic Package Information”.
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| PIN NO. | SYMBOL | NAME AND FUNCTION |
|---|---|---|
| 1 2, 3, 4, 5, 6, 7, 8, 9 10 18, 17, 16, 15, 14, 13, 12, 11 19 20 | DIR A to A 0 7 GND B to B 0 7 OE V CC | direction control data inputs/outputs ground (0 V) data inputs/outputs output enable input (active LOW) positive supply voltage |
| INPUTS | INPUTS/OUTPUTS | ||
| OE | DIR | A n | B n |
| L L H | L H X | A = B inputs Z | inputs B = A Z |
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