Download PDF74HCT574D652 NXP
Document overview
- PDF pages: 7
Technical content
Page 1
Page 2
| SYMBOL | PARAMETER | CONDITIONS | TYPICAL | UNIT | |
|---|---|---|---|---|---|
| HC | HCT | ||||
| t t PHL/ PLH | propagation delay CP to Q n | C = 15 pF; V = 5 V L CC | 14 | 15 | ns |
| f max | maximum clock frequency | 123 | 76 | MHz | |
| C I | input capacitance | 3.5 | 3.5 | pF | |
| C PD | power dissipation capacitance per flip-flop | notes 1 and 2 | 22 | 25 | pF |
Page 3
| PIN NO. | SYMBOL | NAME AND FUNCTION |
|---|---|---|
| 1 2, 3, 4, 5, 6, 7, 8, 9 10 11 19, 18, 17, 16, 15, 14, 13, 12 20 | OE D to D 0 7 GND CP Q to Q 0 7 V CC | 3-state output enable input (active LOW) data inputs ground (0 V) clock input (LOW-to-HIGH, edge-triggered) 3-state flip-flop outputs positive supply voltage |
Page 4
| OPERATING MODES | INPUTS | INTERNAL FLIP-FLOPS | OUTPUTS | ||
| OE | CP | D n | Q to Q 0 7 | ||
| load and read register | L L | ↑ ↑ | l h | L H | L H |
| load register and disable outputs | H H | ↑ ↑ | l h | L H | Z Z |
Page 5
Page 6
| SYMBOL | PARAMETER | T (°C) amb | UNIT | TEST CONDITIONS | |||||||
|---|---|---|---|---|---|---|---|---|---|---|---|
| 74HCT | V CC (V) | WAVEFORMS | |||||||||
| +25 | −40 to +85 | −40 to +125 | |||||||||
| min. | typ. | max. | min. | max. | min. | max. | |||||
| t / t PHL PLH | propagation delay CP to Q n | 18 | 33 | 41 | 50 | ns | 4.5 | Fig.6 | |||
| t / t PZH PZL | 3-state output enable time OE to Q n | 19 | 33 | 41 | 50 | ns | 4.5 | Fig.7 | |||
| t / t PHZ PLZ | 3-state output disable time OE to Q n | 16 | 28 | 35 | 42 | ns | 4.5 | Fig.7 | |||
| t / t THL TLH | output transition time | 5 | 12 | 15 | 18 | ns | 4.5 | Fig.6 | |||
| t W | clock pulse width HIGH or LOW | 16 | 7 | 20 | 24 | ns | 4.5 | Fig.6 | |||
| t su | set-up time D to CP n | 12 | 3 | 15 | 18 | ns | 4.5 | Fig.8 | |||
| t h | hold time D to CP n | 5 | −1 | 5 | 5 | ns | 4.5 | Fig.8 | |||
| f max | maximum clock pulse frequency | 30 | 69 | 24 | 20 | MHz | 4.5 | Fig.6 | |||
Page 7
