74HCT4066D-T

DATASHEET SEARCH SITE

Document overview

• PDF pages: 25

Technical content

Page 1

1. General description

The 74HC4066; 74HCT4066 is a quad single pole, single throw analog switch. Each switch features two input/output terminals (nY and nZ) and an active HIGH enable input (nE). When nE is LOW, the analog switch is turned off. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.

2. Features and benefits

 Input levels nE inputs:  For 74HC4066: CMOS level  For 74HCT4066: TTL level  Low ON resistance:  50  (typical) at VCC = 4.5 V  45  (typical) at VCC = 6.0 V  35  (typical) at VCC = 9.0 V  Specified in compliance with JEDEC standard no. 7A  ESD protection:  HBM JESD22-A114F exceeds 2000 V  MM JESD22-A115-A exceeds 200 V  Multiple package options  Specified from 40 C to +85 C and 40 C to +125 C

Page 2

3. Ordering information

Table 1. Ordering information

plastic dual in-line package; 14 leads (300 mil)

74HC4066N

40 C to +125 C DIP14

SOT27-1

74HCT4066N

plastic small outline package; 14 leads; body width

74HC4066D

40 C to +125 C SO14

SOT108-1

3.9 mm

74HCT4066D

plastic shrink small outline package; 14 leads; body

74HC4066DB 40 C to +125 C SSOP14

SOT337-1

width 5.3 mm

74HCT4066DB 74HC4066PW 40 C to +125 C TSSOP14 plastic thin shrink small outline package; 14 leads; body

SOT402-1

width 4.4 mm

74HCT4066PW 74HC4066BQ 40 C to +125 C DHVQFN14 plastic dual in-line compatible thermal enhanced very

SOT762-1

thin quad flat package; no leads; 14 terminals;

74HCT4066BQ

body 2.5  3  0.85 mm

4. Functional diagram

2 of 25

Page 3

5. Pinning information

5.1 Pinning

5.2 Pin description

Table 2. Pin description Symbol

Pin

1Z, 2Z, 3Z, 4Z

2, 3, 9, 10

1Y, 2Y, 3Y, 4Y

1, 4, 8, 11

GND

7

1E, 2E, 3E, 4E

13, 5, 6, 12 14

VCC

Description

independent input or output independent input or output ground (0 V) enable input (active HIGH) supply voltage

3 of 25

Page 4

6. Functional description

Table 3. Function table[1] Input nE

Switch

L

OFF

H

ON

[1] H = HIGH voltage level; L = LOW voltage level.

7. Limiting values

Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter

Conditions

Min Max Unit

supply voltage

0.5 +11.0 V

VCC

VI < 0.5 V or VI > VCC + 0.5 V

input clamping current

• 20 mA

IIK

VSW < 0.5 V or VSW > VCC + 0.5 V

switch clamping current

• 20 mA

ISK

[1] -

VSW = 0.5 V to VCC + 0.5 V

switch current

25 mA

ISW supply current

• 50 mA

ICC ground current

• 50 mA

IGND storage temperature

65 +150 C

Tstg

Tamb = 40 C to +125 C

total power dissipation Ptot

packages

P power dissipation

per switch

[2]

DIP14 package

• 750

SO14, (T)SSOP14 and DHVQFN14

• 500
• 100 mW

[1] To avoid drawing VCC current out of terminal Z, when switch current flows in terminals Yn, the voltage drop across the bidirectional switch must not exceed 0.4 V. If the switch current flows into terminal Z, no VCC current will flow out of terminals Yn. In this case there is no limit for the voltage drop across the switch, but the voltages at Yn and Z may not exceed VCC or GND. [2] For DIP14 package: Ptot derates linearly with 12 mW/K above 70 C. For SO14 package: Ptot derates linearly with 8 mW/K above 70 C. For (T)SSOP14 packages: Ptot derates linearly with 5.5 mW/K above 60 C. For DHVQFN14 packages: Ptot derates linearly with 4.5 mW/K above 60 C.

4 of 25

Page 5

8. Recommended operating conditions

Table 5. Recommended operating conditions

supply voltage

2.0 5.0 10.0 4.5 5.0 5.5 V

VCC input voltage

GND - VCC GND - VCC V

VI switch voltage

GND - VCC GND - VCC V

VSW ambient temperature

40 +25 +125 40 +25 +125 C

Tamb

VCC = 2.0 V

• - 625 - - - ns/V

t/V input transition rise and fall rate

VCC = 4.5 V

• 1.67 139 - 1.67 139 ns/V

VCC = 6.0 V

• - 83 - - - ns/V

VCC = 10.0 V

• - 35 - - - ns/V

9. Static characteristics

Table 6. RON resistance per switch for types 74HC4066 and 74HCT4066 VI = VIH or VIL; for test circuit see Figure 6. Vis is the input voltage at a Yn or Z terminal, whichever is assigned as an input. Vos is the output voltage at a Yn or Z terminal, whichever is assigned as an output. For 74HC4066: VCC  GND = 2.0 V, 4.5 V, 6.0 V and 9.0 V. For 74HCT4066: VCC  GND = 4.5 V.

ON resistance (peak)

Vis = VCC to GND

RON(peak)

[2]

VCC = 2.0 V; ISW = 100 A

• - - - - 

VCC = 4.5 V; ISW = 1000 A

• 54 - 118 142 

VCC = 6.0 V; ISW = 1000 A

• 42 - 105 126 

VCC = 9.0 V; ISW = 1000 A

• 32 - 88 105 

ON resistance (rail)

Vis = GND

RON(rail)

[2]

VCC = 2.0 V; ISW = 100 A

• 80 - - - 

VCC = 4.5 V; ISW = 1000 A

• 35 - 95 115 

VCC = 6.0 V; ISW = 1000 A

• 27 - 82 100 

VCC = 9.0 V; ISW = 1000 A

• 20 - 70 85 

Vis = VCC

[2]

VCC = 2.0 V; ISW = 100 A

• 100 - - - 

VCC = 4.5 V; ISW = 1000 A

• 42 - 106 128 

VCC = 6.0 V; ISW = 1000 A

• 35 - 94 113 

VCC = 9.0 V; ISW = 1000 A

• 20 - 78 95 

5 of 25

Page 6

Table 6. RON resistance per switch for types 74HC4066 and 74HCT4066 …continued VI = VIH or VIL; for test circuit see Figure 6. Vis is the input voltage at a Yn or Z terminal, whichever is assigned as an input. Vos is the output voltage at a Yn or Z terminal, whichever is assigned as an output. For 74HC4066: VCC  GND = 2.0 V, 4.5 V, 6.0 V and 9.0 V. For 74HCT4066: VCC  GND = 4.5 V.

RON ON resistance

Vis = VCC to GND

mismatch between

[2]

VCC = 2.0 V

• - - - - 

channels

VCC = 4.5 V

• 5 - - - 

VCC = 6.0 V

• 4 - - - 

VCC = 9.0 V

• 3 - - - 

[1] Typical values are measured at Tamb = 25 C. [2] At supply voltages (VCC  GND) approaching 2 V, the analog switch ON resistance becomes extremely non-linear. Therefore it is recommended that these devices be used to transmit digital signals only, when using these supply voltages.

6 of 25

Page 7

Table 7. Static characteristics 74HC4066 At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Vis is the input voltage at a Yn or Z terminal, whichever is assigned as an input. Vos is the output voltage at a Yn or Z terminal, whichever is assigned as an output.

Typ[1] Max Unit

Symbol Parameter

Conditions

Min

Tamb = 40 C to +85 C

HIGH-level input voltage

VCC = 2.0 V

1.5 1.2 - V

VIH

VCC = 4.5 V

3.15 2.4

• V

VCC = 6.0 V

4.2 3.2 - V

VCC = 9.0 V

6.3 4.7 - V

LOW-level input voltage

VCC = 2.0 V

• 0.8 0.5 V

VIL

VCC = 4.5 V

• 2.1 1.35 V

VCC = 6.0 V

• 2.8 1.80 V

VCC = 9.0 V

• 4.3 2.70 V

input leakage current

VI = VCC or GND

II

VCC = 6.0 V

• - 1.0 A

VCC = 10.0 V

• - 2.0 A

OFF-state leakage current

VCC = 10.0 V; VI = VIH or VIL;

IS(OFF)

VSW = VCC  GND; see Figure 8 per channel

• - 1.0 A

ON-state leakage current

VCC = 10.0 V; VI = VIH or VIL;

• - 1.0 A

IS(ON)

VSW = VCC  GND; see Figure 9

ICC

supply current

VI = VCC or GND; Vis = GND or VCC; Vos = VCC or GND VCC = 6.0 V

• - 20.0 A

VCC = 10.0 V

• - 40.0 A

input capacitance

• 3.5 - pF

CI

switch capacitance

• 8 - pF

Csw Tamb = 40 C to +125 C

HIGH-level input voltage

VCC = 2.0 V

1.5 - - V

VIH

VCC = 4.5 V

3.15 -

• V

VCC = 6.0 V

4.2 - - V

VCC = 9.0 V

6.3 - - V

LOW-level input voltage

VCC = 2.0 V

• - 0.50 V

VIL

VCC = 4.5 V

• - 1.35 V

VCC = 6.0 V

• - 1.80 V

VCC = 9.0 V

• - 2.70 V

input leakage current

VI = VCC or GND

II

VCC = 6.0 V

• - 1.0 A

VCC = 10.0 V

• - 2.0 A

OFF-state leakage current

VCC = 10.0 V; VI = VIH or VIL;

IS(OFF)

VSW = VCC  GND; see Figure 8 per channel

• - 1.0 A

ON-state leakage current

VCC = 10.0 V; VI = VIH or VIL;

• - 1.0 A

IS(ON)

VSW = VCC  GND; see Figure 9

7 of 25

Page 8

Table 7. Static characteristics 74HC4066 …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Vis is the input voltage at a Yn or Z terminal, whichever is assigned as an input. Vos is the output voltage at a Yn or Z terminal, whichever is assigned as an output. Symbol Parameter

Conditions

ICC

supply current

VI = VCC or GND; Vis = GND or VCC; Vos = VCC or GND VCC = 6.0 V VCC = 10.0 V

[1] Typical values are measured at Tamb = 25 C.

Table 8. Static characteristics 74HCT4066 At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Vis is the input voltage at a Yn or Z terminal, whichever is assigned as an input. Vos is the output voltage at a Yn or Z terminal, whichever is assigned as an output. Symbol Parameter

Conditions

Tamb = 40 C to +85 C

HIGH-level input voltage

VCC = 4.5 V to 5.5 V

VIH

LOW-level input voltage

VCC = 4.5 V to 5.5 V

VIL

input leakage current

VI = VCC or GND; VCC = 5.5 V

II

OFF-state leakage current

VCC = 5.5 V; VI = VIH or VIL;

IS(OFF)

VSW = VCC  GND; see Figure 8 per channel

ON-state leakage current

VCC = 5.5 V; VI = VIH or VIL;

IS(ON)

VSW = VCC  GND; see Figure 9

supply current

VI = VCC or GND; Vis = GND or VCC;

ICC

Vos = VCC or GND; VCC = 4.5 V to 5.5 V

ICC

additional supply current

per input pin; VI = VCC  2.1 V; other inputs at VCC or GND; VCC = 4.5 V to 5.5 V

input capacitance

CI

switch capacitance

Csw Tamb = 40 C to +125 C

HIGH-level input voltage

VCC = 4.5 V to 5.5 V

VIH

LOW-level input voltage

VCC = 4.5 V to 5.5 V

VIL

input leakage current

VI = VCC or GND; VCC = 5.5 V

II

OFF-state leakage current

VCC = 5.5 V; VI = VIH or VIL;

IS(OFF)

VSW = VCC  GND; see Figure 8 per channel

ON-state leakage current

VCC = 5.5 V; VI = VIH or VIL;

IS(ON)

VSW = VCC  GND; see Figure 9

ICC

supply current

VI = VCC or GND; Vis = GND or VCC; Vos = VCC or GND; VCC = 4.5 V to 5.5 V

additional supply current

per input pin; VI = VCC  2.1 V; other inputs

ICC

at VCC or GND; VCC = 4.5 V to 5.5 V

[1] Typical values are measured at Tamb = 25 C.

Typ[1] Max Unit Min

• - 40 A
• - 80 A

Typ[1] Max Unit Min

2.0 1.6 - V

• 1.2 0.8 V
• - 1.0 A
• - 1.0 A
• - 1.0 A
• - 20.0 A
• 100 450 A
• 3.5 - pF
• 8 - pF

2.0 - - V

• - 0.8 V
• - 1.0 A
• - 1.0 A
• - 1.0 A
• - 40 A
• - 490 A

8 of 25

Page 9

10. Dynamic characteristics

Table 9. Dynamic characteristics 74HC4066 GND = 0 V; tr = tf = 6 ns; CL = 50 pF unless specified otherwise; for test circuit see Figure 12. Vis is the input voltage at a Yn or Z terminal, whichever is assigned as an input. Vos is the output voltage at a Yn or Z terminal, whichever is assigned as an output.

[2]

propagation delay

nY to nZ or nZ to nY; RL =  ;

tpd

see Figure 10 VCC = 2.0 V

• 8 75 - 90 ns

VCC = 4.5 V

• 3 15 - 18 ns

VCC = 6.0 V

• 2 13 - 15 ns

VCC = 9.0 V

• 2 10 - 12 ns

[4]

turn-off time

nE to nY or nZ; see Figure 11

toff

VCC = 2.0 V

• 44 190 - 225 ns

VCC = 4.5 V

• 16 38 - 45 ns

VCC = 5.0 V; CL = 15 pF

• 13 - - - ns

VCC = 6.0 V

• 13 33 - 38 ns

VCC = 9.0 V

• 16 26 - 30 ns

[3]

turn-on time

nE to nY or nZ; see Figure 11

ton

VCC = 2.0 V

• 36 125 - 150 ns

VCC = 4.5 V

• 13 25 - 30 ns

VCC = 5.0 V; CL = 15 pF

• 11 - - - ns

VCC = 6.0 V

• 10 21 - 26 ns

VCC = 9.0 V

• 8 16 - 20 ns

[5]

power dissipation

per switch; VI = GND to VCC

11

• - - pF

CPD capacitance

[1] Typical values are measured at Tamb = 25 C. [2] tpd is the same as tPHL and tPLH. [3] ton is the same as tPHZ and tPLZ.

9 of 25

Page 10

[4] toff is the same as tPZH and tPZL. [5] CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD  VCC2  fi + {(CL + Csw)  VCC2  fo} where: fi = input frequency in MHz; fo = output frequency in MHz; {(CL + Csw)  VCC2  fo} = sum of outputs; CL = output load capacitance in pF; Csw = switch capacitance in pF; VCC = supply voltage in V.

Table 10. Dynamic characteristics 74HCT4066 GND = 0 V; tr = tf = 6 ns; CL = 50 pF unless specified otherwise; for test circuit see Figure 12. Vis is the input voltage at a Yn or Z terminal, whichever is assigned as an input. Vos is the output voltage at a Yn or Z terminal, whichever is assigned as an output.

[2]

propagation

nY to nZ or nZ to nY; RL =  ;

tpd delay

see Figure 10 VCC = 4.5 V

• 3 15 - 18 ns

[4]

turn-off time

nE to nY or nZ; see Figure 11

toff

VCC = 4.5 V

• 20 44 - 53 ns

VCC = 5.0 V; CL = 15 pF

• 16 - - - ns

[3]

turn-on time

nE to nY or nZ; see Figure 11

ton

VCC = 4.5 V

• 12 30 - 36 ns

VCC = 5.0 V; CL = 15 pF

• 12 - - - ns

[5]

power dissipation per switch;

• 12 - - - pF

CPD capacitance

VI = GND to (VCC  1.5 V)

[1] Typical values are measured at Tamb = 25 C. [2] tpd is the same as tPHL and tPLH. [3] ton is the same as tPHZ and tPLZ. [4] toff is the same as tPZH and tPZL. [5] CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD  VCC2  fi + {(CL + Csw)  VCC2  fo} where: fi = input frequency in MHz; fo = output frequency in MHz; {(CL + Csw)  VCC2  fo} = sum of outputs; CL = output load capacitance in pF; Csw = switch capacitance in pF; VCC = supply voltage in V.

10 of 25

Page 11

11. Waveforms

Table 11. Measurement points Type

VI

VM

74HC4066

VCC

0.5VCC

74HCT4066

3.0 V

1.3 V

11 of 25

Page 12

Table 12. Test data

tPHL, tPLH

GND

GND to VCC

6 ns

50 pF

-

open

tPHZ, tPZH

GND to VCC

VCC

6 ns

50 pF, 15 pF

1 k

GND

tPLZ, tPZL

GND to VCC

GND

6 ns

50 pF, 15 pF

1 k

VCC

[1] For 74HCT4066: maximum input voltage VI = 3.0 V.

12 of 25

Page 13

12. Additional dynamic characteristics

Table 13. Additional dynamic characteristics Recommended conditions and typical values; GND = 0 V; Tamb = 25 C. Vis is the input voltage at a Yn or Z terminal, whichever is assigned as an input. Vos is the output voltage at a Yn or Z terminal, whichever is assigned as an output. Symbol Parameter

Conditions

Min Typ Max Unit

fi = 1 kHz; RL = 10 k; CL = 50 pF;

%

THD total harmonic distortion

see Figure 13 VCC = 4.5 V; VI = 4.0 V (p-p)

• 0.04 -

%

VCC = 9.0 V; VI = 8.0 V (p-p)

• 0.02 -

%

fi = 10 kHz; RL = 10 k; CL = 50 pF; see Figure 13 VCC = 4.5 V; VI = 4.0 V (p-p)

• 0.12 -

%

VCC = 9.0 V; VI = 8.0 V (p-p)

• 0.06 -

%

[2]

3 dB frequency response

RL = 50 ; CL = 10 pF; see Figure 15

f(3dB)

VCC = 4.5 V

• 180 - MHz

VCC = 9.0 V

• 200 - MHz

[1]

isolation (OFF-state)

RL = 600 ; CL = 50 pF; fi = 1 MHz;

iso

see Figure 14 VCC = 4.5 V

• 50 - dB

VCC = 9.0 V

• 50 - dB

crosstalk voltage

between digital input and switch (peak to

Vct

peak value); RL = 600 ; CL = 50 pF; fi = 1 MHz; see Figure 16 VCC = 4.5 V

• 110 - mV

VCC = 9.0 V

• 220 - mV

[1]

between switches; RL = 600 ; CL = 50 pF;

Xtalk crosstalk

fi = 1 MHz; see Figure 17 VCC = 4.5 V

• 60 - dB

VCC = 9.0 V

• 60 - dB

[1] Adjust input voltage Vis to 0 dBm level (0 dBm = 1 mW into 600 ). [2] Adjust input voltage Vis to 0 dBm level at Vos for fi = 1 MHz (0 dBm = 1 mW into 50 ). After set-up, fi is increased to obtain a reading of 3 dB at Vos.

13 of 25

Page 14

14 of 25

Page 15

15 of 25

Page 16

16 of 25

Page 17

13. Package outline

DIP14: plastic dual in-line package; 14 leads (300 mil)

SOT27-1

ME

D

A2 A

A1

L

c

e

w M

Z

b1

(e ) 1

b

MH

8

14

pin 1 index

E

1

7

0 5 10 mm

scale

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

Note 1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.

Fig 18. Package outline SOT27-1 (DIP14)

17 of 25

Page 18

SO14: plastic small outline package; 14 leads; body width 3.9 mm

SOT108-1

D

E

A X

c

y

HE

v M A

Z

8

14

Q

A2

A (A ) 3

A1

pin 1 index

θ Lp L

7

1

e

detail X

w M bp

0 2.5 5 mm scale

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.

Fig 19. Package outline SOT108-1 (SO14)

18 of 25

Page 19

SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm

SOT337-1

D

E

A X

c

y

HE

v M A

Z

8

14

Q

A2

A (A )

A1

3

pin 1 index

θ Lp L

7

1

detail X

w M bp

e

0 2.5 5 mm scale

DIMENSIONS (mm are the original dimensions)

Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.

REFERENCES

OUTLINE

EUROPEAN

ISSUE DATE

VERSION

PROJECTION

IEC

JEDEC

JEITA

99-12-27

MO-150

SOT337-1

03-02-19

Fig 20. Package outline SOT337-1 (SSOP14)

19 of 25

Page 20

TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm

SOT402-1

E

A

D

X

c

y

HE

v M A

Z

8

14

Q (A )

A2

3 A

A1

pin 1 index

θ Lp L

1

7

detail X

w M bp

e

0 2.5 5 mm

scale

DIMENSIONS (mm are the original dimensions)

Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.

REFERENCES

OUTLINE

EUROPEAN

ISSUE DATE

VERSION

PROJECTION

IEC

JEDEC

JEITA

99-12-27

SOT402-1

MO-153

03-02-18

Fig 21. Package outline SOT402-1 (TSSOP14)

20 of 25

Page 21

DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;

SOT762-1

14 terminals; body 2.5 x 3 x 0.85 mm

B A

D

A A1

E

c

detail X

terminal 1 index area

C

terminal 1

e1

index area

y

y1 C

e

v M C A B

b

w M C

2

6

L

1

7

Eh

e

14

8

13

9 Dh

X

0

2.5

5 mm

scale

DIMENSIONS (mm are the original dimensions)

Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.

Fig 22. Package outline SOT762-1 (DHVQFN14)

21 of 25

Page 22

14. Abbreviations

Table 14. Abbreviations Acronym

Description

CMOS

Complementary Metal Oxide Semiconductor

ESD

ElectroStatic Discharge

HBM

Human Body Model

MM

Machine Model

15. Revision history

Table 15. Revision history Document ID

Release date

Data sheet status

74HC_HCT4066 v.7

20130402

-

• Descriptive title corrected (errata).

Modifications:

• New general description (errata).

74HC_HCT4066 v.6

20120718

• Change notice

Supersedes 74HC_HCT4066 v.6

74HC_HCT4066 v.5

• The format of this data sheet has been redesigned to comply with the new identity

Modifications:

guidelines of NXP Semiconductors.

• Legal texts have been adapted to the new company name where appropriate.

74HC_HCT4066 v.5

20041111

-

74HC_HCT4066 v.4

20030617

-

74HC_HCT4067_CNV v.3 19981110

-

74HC_HCT4066_CNV v.2 19981002

Product specification

-

74HC_HCT4066 v.4 74HC_HCT4066_CNV v.3 74HC_HCT4066_CNV v.2 -

22 of 25

Page 23

16. Legal information

16.1 Data sheet status

Document status[1][2]

Product status[3]

Definition This document contains data from the objective specification for product development.

Objective [short] data sheet

Development

This document contains data from the preliminary specification.

Preliminary [short] data sheet Qualification

This document contains the product specification.

Product [short] data sheet

Production

[1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com.

16.2 Definitions

Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data

sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet.

16.3 Disclaimers

Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. NXP Semiconductors takes no responsibility for the content in this document if provided by an information source outside of NXP Semiconductors. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or

replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without

notice. This document supersedes and replaces all information supplied prior to the publication hereof.

Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these

products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate

design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect.

Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial

sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights.

23 of 25

Page 24

Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in

automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors’ warranty of the

17. Contact information

For more information, please visit: http://www.nxp.com

product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications.

16.4 Trademarks

Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners.

For sales office addresses, please send an email to: salesaddresses@nxp.com

24 of 25

Page 25

18. Contents

1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information. . . . . . . . . . . . . . . . . . . . . 2 4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 5 Pinning information. . . . . . . . . . . . . . . . . . . . . . 3 5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 6 Functional description . . . . . . . . . . . . . . . . . . . 4 7 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 8 Recommended operating conditions. . . . . . . . 5 9

Static characteristics. . . . . . . . . . . . . . . . . . . . . 5 10 Dynamic characteristics . . . . . . . . . . . . . . . . . . 9 11 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 12 Additional dynamic characteristics . . . . . . . . 13 13 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 17 14 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 22 15 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 22 16 Legal information. . . . . . . . . . . . . . . . . . . . . . . 23 16.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 23 16.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

16.3 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 16.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 24 17 Contact information. . . . . . . . . . . . . . . . . . . . . 24 18 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’.

© NXP B.V. 2013.

All rights reserved.

For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com

Date of release: 2 April 2013 Document identifier: 74HC_HCT4066