74HC4002 PHILIPS
Document overview
- PDF pages: 6
Technical content
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FEATURES
- Output capability: standard
- ICC category: SSI
GENERAL DESCRIPTION
The 74HC/HCT4002 are high-speed Si-gate CMOS devices and are pin compatible with “4002” of the “4000B” series. They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT4002 provide the 4-input NOR function.
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns
| SYMBOL | PARAMETER | CONDITIONS | TYPICAL | UNIT | |
|---|---|---|---|---|---|
| HC | HCT | ||||
| t / t PHL PLH | propagation delay nA, nB, nC, nD to nY | C = 15 pF; V = 5 V L CC | 9 | 11 | ns |
| C I | input capacitance | 3.5 | 3.5 | pF | |
| C PD | power dissipation capacitance per gate | notes 1 and 2 | 16 | 22 | pF |
Notes 1. CPD is used to determine the dynamic power dissipation (PD in µW): PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where: fi = input frequency in MHz fo = output frequency in MHz ∑ (CL × VCC2 × fo) = sum of outputs CL = output load capacitance in pF VCC = supply voltage in V 2. For HC the condition is VI = GND to VCC For HCT the condition is VI = GND to VCC − 1.5 V
ORDERING INFORMATION
See “74HC/HCT/HCU/HCMOS Logic Package Information”.
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PIN DESCRIPTION
| PIN NO. | SYMBOL | NAME AND FUNCTION |
|---|---|---|
| 1, 13 2, 9 3, 10 4, 11 5, 12 6, 8 7 14 | 1Y, 2Y 1A, 2A 1B, 2B 1C, 2C 1D, 2D n.c. GND V CC | data outputs data inputs data inputs data inputs data inputs not connected ground (0 V) positive supply voltage |
Fig.2 Logic symbol.
Fig.1 Pin configuration.
Fig.3 IEC logic symbol.
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Fig.4 Functional diagram.
Fig.5 Logic diagram 74HC4002 (one gate).
FUNCTION TABLE
| Column 1 | Column 2 | Column 3 | Column 4 | Column 5 |
|---|---|---|---|---|
| INPUTS | OUTPUT | |||
| nA | nB | nC | nD | nY |
| L H X X X | L X H X X | L X X H X | L X X X H | H L L L L |
Notes 1. H = HIGH voltage level L = LOW voltage level X = don’t care
Fig.6 Logic diagram 74HCT4002 (one gate).
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DC CHARACTERISTICS FOR 74HC
For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”. Out put capability: standard ICC category: SSI
AC CHARACTERISTICS FOR 74HC
GND = 0 V; tr = tf = 6 ns; CL = 50 pF
| SYMBOL | PARAMETER | T (°C) amb | UNIT | TEST CONDITIONS | |||||||
|---|---|---|---|---|---|---|---|---|---|---|---|
| 74HC | V CC (V) | WAVEFORMS | |||||||||
| +25 | −40 to +85 | −40 to +125 | |||||||||
| min. | typ. | max. | min. | max. | min. | max. | |||||
| t / t PHL PLH | propagation delay nA, nB, nC, nD to nY | 30 11 9 | 100 20 17 | 125 25 21 | 150 30 26 | ns | 2.0 4.5 6.0 | Fig.7 | |||
| t / t THL TLH | output transition time | 19 7 6 | 75 15 13 | 95 19 16 | 110 22 19 | ns | 2.0 4.5 6.0 | Fig.7 |
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DC CHARACTERISTICS FOR 74HCT
For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”. Output capability: standard ICC category: SSI
Note to HCT types The value of additional quiescent supply current (∆ICC) for a unit load of 1 is given in the family specifications. To determine ∆ICC per input, multiply this value by the unit load coefficient shown in the table below.
| INPUT | UNIT LOAD COEFFICIENT |
|---|---|
| nA, nB, nC, nD | 0.45 |
AC CHARACTERISTICS FOR 74HCT
GND = 0 V; tr = tf = 6 ns; CL = 50 pF
| SYMBOL | PARAMETER | T (°C) amb | UNIT | TEST CONDITIONS | |||||||
|---|---|---|---|---|---|---|---|---|---|---|---|
| 74HCT | V CC (V) | WAVEFORMS | |||||||||
| +25 | −40 to +85 | −40 to +125 | |||||||||
| min. | typ. | max. | min. | max. | min. | max. | |||||
| t / t PHL PLH | propagation delay nA, nB, nC, nD to nY | 13 | 22 | 28 | 33 | ns | 4.5 | Fig.7 | |||
| t / t THL TLH | output transition time | 7 | 15 | 19 | 22 | ns | 4.5 | Fig.7 |
AC WAVEFORMS
(1) HC : VM = 50%; VI = GND to VCC. HCT: VM = 1.3 V; VI = GND to 3 V.
Fig.7 Waveforms showing the input (nA, nB, nC, nD) to output (nY) propagation delays and the output transition times.
PACKAGE OUTLINES
See “74HC/HCT/HCU/HCMOS Logic Package Outlines”.