Download PDF74HC30 PHILIPS
Document overview
- PDF pages: 6
Technical content
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FEATURES
- Output capability: standard
- ICC category: SSI
GENERAL DESCRIPTION
The 74HC/HCT30 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT30 provide the 8-input NAND function.
QUICK REFERENEC DATA
GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns
| SYMBOL | PARAMETER | CONDITIONS | TYPICAL | UNIT | |
|---|---|---|---|---|---|
| HC | HCT | ||||
| t / t PHL PLH | propagation delay A, B, C, D, E, F, G, H to Y | C = 15 pF; V = 5 V L CC | 12 | 12 | ns |
| C I | input capacitance | 3.5 | 3.5 | pF | |
| C PD | power dissipation capacitance per gate | notes 1 and 2 | 15 | 15 | pF |
Notes 1. CPD is used to determine the dynamic power dissipation (PD in µW): PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where: fi = input frequency in MHz fo = output frequency in MHz ∑ (CL × VCC2 × fo) = sum of outputs CL = output load capacitance in pF VCC = supply voltage in V 2. For HC the condition is VI = GND to VCC For HCT the condition is VI = GND to VCC − 1.5 V
ORDERING INFORMATION
See “74HC/HCT/HCU/HCMOS Logic Package Information”.
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PIN DESCRIPTION
| PIN NO. | SYMBOL | NAME AND FUNCTION |
|---|---|---|
| 1 2 3 4 5 6 7 8 9, 10, 13 11 12 14 | A B C D E F GND Y n.c. G H V CC | data input data input data input data input data input data input ground (0 V) data output not connected data input data input positive supply voltage |
Fig.2 Logic symbol.
Fig.1 Pin configuration.
Fig.3 IEC logic symbol.
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Fig.4 Functional diagram;
Fig.5 Logic diagram.
Y = ABCDEFGH.
FUNCTION TABLE
| Column 1 | Column 2 | Column 3 | Column 4 | Column 5 | Column 6 | Column 7 | Column 8 | Column 9 |
|---|---|---|---|---|---|---|---|---|
| INPUTS | OUTPUT | |||||||
| A | B | C | D | E | F | G | H | Y |
| L X X X | X L X X | X X L X | X X X L | X X X X | X X X X | X X X X | X X X X | H H H H |
| X X X X | X X X X | X X X X | X X X X | L X X X | X L X X | X X L X | X X X L | H H H H |
| H | H | H | H | H | H | H | H | L |
Notes 1. H = HIGH voltage level L = LOW voltage level X = don’t care
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DC CHARACTERISTICS FOR 74 HC
For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”. Output capability: standard ICC category: SSI
AC CHARACTERISTICS FOR 74HC
GND = 0 V; tr = tf = 6 ns; CL = 50 pF
| SYMBOL | PARAMETER | T (°C) amb | UNIT | TEST CONDITIONS | |||||||
|---|---|---|---|---|---|---|---|---|---|---|---|
| 74HC | V CC (V) | WAVEFORMS | |||||||||
| +25 | −40 to + 85 | −40 to +125 | |||||||||
| min. | typ. | max. | min. | max. | min. | max. | |||||
| t / t PHL PLH | propagation delay A, B, C, D, E, F, G, H to Y | 41 15 12 | 130 26 22 | 165 33 28 | 195 39 33 | ns | 2.0 4.5 6.0 | Fig.6 | |||
| t / t THL TLH | output transition time | 19 7 6 | 75 15 13 | 95 19 16 | 110 22 19 | ns | 2.0 4.5 6.0 | Fig.6 |
DC CHARACTERISTICS FOR 74HCT
For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”. Output capability: standard ICC category: SSI
Note to HCT types The value of additional quiescent supply current (∆ICC) for a unit load of 1 is given in the family specifications. To determine ∆ICC per input, multiply this value by the unit load coefficient shown in the table below.
| INPUT | UNIT LOAD COEFFICIENT |
|---|---|
| A, B, C, D, E, F, G, H | 0.60 |
AC CHARACTERISTICS FOR 74HCT
GND = 0 V; tr = tf = 6 ns; CL = 50 pF
| SYMBOL | PARAMETER | T (°C) amb | UNIT | TEST CONDITIONS | |||||||
|---|---|---|---|---|---|---|---|---|---|---|---|
| 74HCT | V CC (V) | WAVEFORMS | |||||||||
| +25 | −40 to + 85 | −40 to +125 | |||||||||
| min. | typ. | max. | min. | max. | min. | max. | |||||
| t / t PHL PLH | propagation delay A, B, C, D, E, F, G, H to Y | 16 | 28 | 35 | 42 | ns | 4.5 | Fig.6 | |||
| t / t THL TLH | output transition time | 7 | 15 | 19 | 22 | ns | 4.5 | Fig.6 |
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