74HCT2G126GD

74HC2G126 NXP

Document overview

• PDF pages: 14

Technical content

Page 1

1. General description

The 74HC2G126; 74HCT2G126 is a high-speed Si-gate CMOS device.

The 74HC2G126; 74HCT2G126 provides two non-inverting buffer/line drivers with 3-state output. The 3-state output is controlled by the output enable input pin nOE. A LOW at pin nOE causes the output to assume a high-impedance OFF-state.

The bus driver output currents are equal compared to the 74HC126 and 74HCT126.

2. Features

I Wide operating voltage from 2.0 V to 6.0 V I Symmetrical output impedance I High noise immunity I Low power dissipation I Balanced propagation delays I ESD protection: N HBM JESD22-A114F exceeds 2000 V N MM JESD22-A115-A exceeds 200 V I Multiple package options I Specified from −40 °C to +85 °C and −40 °C to +125 °C

3. Ordering information

Table 1. Ordering information

−40 °C to +125 °C TSSOP8 plastic thin shrink small outline package; 8 leads;

74HC2G126DP

SOT505-2

body width 3 mm; lead length 0.5 mm

74HCT2G126DP

−40 °C to +125 °C VSSOP8 plastic very thin shrink small outline package; 8 leads;

74HC2G126DC

SOT765-1

body width 2.3 mm

74HCT2G126DC

−40 °C to +125 °C XSON8U plastic extremely thin small outline package; no leads;

74HC2G126GD

SOT996-2

8 terminals; UTLP based; body 3 × 2 × 0.5 mm

74HCT2G126GD

Page 2

4. Marking

Table 2. Marking codes[1] Type number

Marking code

74HC2G126DP

H26

74HCT2G126DP

T26

74HC2G126DC

H26

74HCT2G126DC

T26

74HC2G126GD

H26

74HCT2G126GD

T26

[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.

5. Functional diagram

6. Pinning information

6.1 Pinning

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Page 3

6.2 Pin description

Table 3. Pin description Symbol

Pin

Description

1OE, 2OE

1, 7

output enable input

1A, 2A

2, 5

data input

1Y, 2Y

6, 3

data output

GND

4

ground (0 V)

8

supply voltage

VCC

7. Functional description

Table 4. Function table[1]

H

L

L

H

H

H

L

X

Z

[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.

8. Limiting values

Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter

Conditions

Min Max Unit

supply voltage

−0.5 +7.0 V

VCC

[1] -

input clamping current

VI < −0.5 V or VI > VCC + 0.5 V

±20 mA

IIK

[1] -

output clamping current

VO < −0.5 V or VO > VCC + 0.5 V

±20 mA

IOK

[1] -

output current

VO = −0.5 V to (VCC + 0.5 V)

±35 mA

IO supply current

• 70 mA

ICC ground current

−70 - mA

IGND storage temperature

−65 +150 °C

Tstg

[2] -

total power dissipation

300 mW

Ptot

[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] For TSSOP8 package: above 55 °C the value of Ptot derates linearly with 2.5 mW/K. For VSSOP8 package: above 110 °C the value of Ptot derates linearly with 8 mW/K. For XSON8U package: above 118 °C the value of Ptot derates linearly with 7.8 mW/K.

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9. Recommended operating conditions

Table 6. Recommended operating conditions Voltages are referenced to GND (ground = 0 V).

supply voltage

2.0 5.0 6.0 4.5 5.0 5.5 V

VCC input voltage

0 - VCC 0 - VCC V

VI output voltage

0 - VCC 0 - VCC V

VO ambient temperature

−40 +25 +125 −40 +25 +125 °C

Tamb

VCC = 2.0 V

• - 625 - - - ns/V

∆t/∆V input transition rise and fall rate

VCC = 4.5 V

• 1.67 139 - 1.67 139 ns/V

VCC = 6.0 V

• - 83 - - - ns/V

10. Static characteristics

Table 7. Static characteristics Voltages are referenced to GND (ground = 0 V). All typical values are measured at Tamb = 25 °C.

74HC2G126 HIGH-level input

VCC = 2.0 V

1.5 1.2 - 1.5

• V

VIH voltage

VCC = 4.5 V

3.15 2.4 - 3.15

• V

VCC = 6.0 V

4.2 3.2 - 4.2

• V

LOW-level input

VCC = 2.0 V

• 0.8 0.5

-

0.5 V

VIL voltage

VCC = 4.5 V

• 2.1 1.35
• 1.35 V

VCC = 6.0 V

• 2.8 1.8

-

1.8 V

HIGH-level

VI = VIH or VIL

VOH output voltage

IO = −20 µA; VCC = 2.0 V

1.9 2.0 - 1.9

• V

IO = −20 µA; VCC = 4.5 V

4.4 4.5 - 4.4

• V

IO = −20 µA; VCC = 6.0 V

5.9 6.0 - 5.9

• V

IO = −6.0 mA; VCC = 4.5 V

3.84 4.32

• 3.7
• V

IO = −7.8 mA; VCC = 6.0 V

5.34 5.81

• 5.2
• V

LOW-level output

VI = VIH or VIL

VOL voltage

IO = 20 µA; VCC = 2.0 V

• 0 0.1

-

0.1 V

IO = 20 µA; VCC = 4.5 V

• 0 0.1

-

0.1 V

IO = 20 µA; VCC = 6.0 V

• 0 0.1

-

0.1 V

IO = 6.0 mA; VCC = 4.5 V

• 0.15 0.33

-

0.4 V

IO = 7.8 mA; VCC = 6.0 V

• 0.16 0.33

-

0.4 V

input leakage

VI = VCC or GND; VCC = 6.0 V

• - ±1.0
• ±1.0 µA

II current OFF-state output

VI = VIH or VIL;

IOZ

• - ±5.0
• ±10 µA

current

VO = VCC or GND; VCC = 6.0 V

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Table 7. Static characteristics …continued Voltages are referenced to GND (ground = 0 V). All typical values are measured at Tamb = 25 °C.

ICC supply current

VI = VCC or GND; IO = 0 A;

• - 10 -

20 µA

VCC = 6.0 V

input capacitance

• 1.0 - -
• pF

CI output

• 1.5 - -
• pF

CO capacitance

74HCT2G126

HIGH-level input

VCC = 4.5 V to 5.5 V

2.0 1.6 - 2.0

• V

VIH voltage LOW-level input

VCC = 4.5 V to 5.5 V

• 1.2 0.8

-

0.8 V

VIL voltage HIGH-level

VI = VIH or VIL; VCC = 4.5 V

VOH output voltage

IO = −20 µA

4.4 4.5 - 4.4

• V

IO = −6.0 mA

3.84 4.32

• 3.7
• V

LOW-level output

VI = VIH or VIL; VCC = 4.5 V

VOL voltage

IO = 20 µA

• 0 0.1

-

0.1 V

IO = 6.0 mA

• 0.16 0.33

-

0.4 V

input leakage

VI = VCC or GND; VCC = 5.5 V

• - ±1.0
• ±1.0 µA

II current OFF-state output

VI = VIH or VIL; VO =

IOZ

• - ±5.0
• ±10

current

VCC or GND; VCC = 5.5 V

supply current

VI = VCC or GND; IO = 0 A;

• - 10 -

20 µA

ICC

VCC = 5.5 V

additional supply

per input; VCC = 4.5 V to 5.5 V;

• - 375
• 410 µA

∆ICC current

VI = VCC − 2.1 V; IO = 0 A

input capacitance

• 1.0 - -
• pF

CI output

• 1.5 - -
• pF

CO capacitance

11. Dynamic characteristics

Table 8. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit see Figure 8.

74HC2G126

[2]

propagation nA to nY; see Figure 6 tpd delay

VCC = 2.0 V

• 35 115 - 135 ns

VCC = 4.5 V

• 11 23 -

27 ns

VCC = 5.0 V; CL = 15 pF

• 10 - -
• ns

VCC = 6.0 V

• 8 20 -

23 ns

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Table 8. Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit see Figure 8.

[2]

ten enable time nOE to nY; see Figure 7

VCC = 2.0 V

• 40 115 - 135 ns

VCC = 4.5 V

• 11 23 -

27 ns

VCC = 6.0 V

• 8 20 -

23 ns

[2]

disable time nOE to nY; see Figure 7 tdis

VCC = 2.0 V

• 25 125 - 150 ns

VCC = 4.5 V

• 12 25 -

30 ns

VCC = 6.0 V

• 10 21 -

26 ns

[2]

transition

nY; see Figure 6

tt time

VCC = 2.0 V

• 18 75 -

90 ns

VCC = 4.5 V

• 6 15 -

18 ns

VCC = 6.0 V

• 5 13 -

15 ns

[3]

per buffer; VI = GND to VCC

power CPD dissipation

output enabled

• 11 - -
• pF

capacitance

output disabled

• 1 - -
• pF

74HCT2G126

[2]

propagation nA to nY; see Figure 6 tpd delay

VCC = 4.5 V

• 15 30 -

36 ns

VCC = 5.0 V; CL = 15 pF

• 12 - -
• ns

[2]

enable time nOE to nY; see Figure 7;

• 11 31 -

38 ns

ten

VCC = 4.5 V

[2]

disable time nOE to nY; see Figure 7;

• 11 35 -

42 ns

tdis

VCC = 4.5 V

[2]

transition

nY; see Figure 6; VCC = 4.5 V

• 6 15 -

18 ns

tt time

[3]

per buffer;

power CPD dissipation VI = GND to VCC − 1.5 V capacitance

output enabled

• 11 - -
• pF

output disabled

• 1 - -
• pF

[1] All typical values are measured at Tamb = 25 °C. [2] tpd is the same as tPLH and tPHL. ten is the same as tPZL and tPZH. tdis is the same as tPLZ and tPHZ. tt is the same as tTHL and tTLH. [3] CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; Σ(CL × VCC2 × fo) = sum of outputs.

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12. Waveforms

Table 9. Measurement points

74HC2G126

0.5VCC

0.5VCC

VOL + 0.3 V

VOH − 0.3 V

VOL + 0.3 V

VOH − 0.3 V

74HCT2G126

1.3 V

1.3 V

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Page 8

Table 10. Test data

74HC2G126

GND to VCC

≤ 6 ns

15 pF, 50 pF

1 kΩ open

GND

VCC

74HCT2G126 GND to 3 V ≤ 6 ns

15 pF, 50 pF

1 kΩ open

GND

VCC

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13. Package outline

TSSOP8: plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm

SOT505-2

D

E

A X

c

HE

v M A

y

Z

5

8

A2 A

(A3)

A1

pin 1 index

θ Lp L

1

4

detail X

w M

e bp

0

2.5

5 mm

scale

DIMENSIONS (mm are the original dimensions)

Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.

REFERENCES

OUTLINE

EUROPEAN

ISSUE DATE

VERSION

PROJECTION

IEC

JEDEC

JEITA

02-01-16

SOT505-2

• - -

Fig 9. Package outline SOT505-2 (TSSOP8)

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Page 10

VSSOP8: plastic very thin shrink small outline package; 8 leads; body width 2.3 mm

SOT765-1

D

E

A X

c

y

HE

v M A

Z

5

8

Q

A2 A A1

(A3)

pin 1 index

θ Lp L

1

4

detail X

e

w M bp

0

2.5

5 mm

scale

DIMENSIONS (mm are the original dimensions)

Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included.

REFERENCES

OUTLINE

EUROPEAN

ISSUE DATE

VERSION

PROJECTION

IEC

JEDEC

JEITA

02-06-07

SOT765-1

MO-187

Fig 10. Package outline SOT765-1 (VSSOP8)

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Page 11

XSON8U: plastic extremely thin small outline package; no leads;

SOT996-2

8 terminals; UTLP based; body 3 x 2 x 0.5 mm

B A

D

A

E

A1

detail X

terminal 1 index area

e1

C

C A B v M b e

L1

y

y1 C

w M C

1

4

L2

L

8

5

X

0 1 2 mm scale

DIMENSIONS (mm are the original dimensions)

Fig 11. Package outline SOT996-2 (XSON8U)

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14. Abbreviations

Table 11. Abbreviations Acronym

Description

CMOS

Complementary Metal Oxide Semiconductor

DUT

Device Under Test

ESD

ElectroStatic Discharge

HBM

Human Body Model

MM

Machine Model

15. Revision history

Table 12. Revision history

Change notice

Document ID

Release date

Data sheet status

20090924

-

• Table 2: Marking codes table added.

Modifications: 74HC_HCT2G126_3

20090507

-

Supersedes 74HC_HCT2G126_3

74HC_HCT2G126_2

• The format of this data sheet has been redesigned to comply with the new identity guidelines

Modifications:

of NXP Semiconductors.

• Legal texts have been adapted to the new company name where appropriate.
• Quick reference data removed
• Added type numbers 74HC2G126GD and 74HCT2G126GD (XSON8U package)
• Section 8: derating factor for TSSOP8, VSSOP8 and XSON8U package added

74HC_HCT2G126_2

20051215

-

74HC_HCT2G126_1

74HC_HCT2G126_1

20030303

-

-

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16. Legal information

16.1 Data sheet status

Document status[1][2]

Product status[3]

Definition This document contains data from the objective specification for product development.

Objective [short] data sheet

Development

This document contains data from the preliminary specification.

Preliminary [short] data sheet Qualification

This document contains the product specification.

Product [short] data sheet

Production

[1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com.

16.2 Definitions

Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data

sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail.

16.3 Disclaimers

General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed,

authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental

17. Contact information

For more information, please visit: http://www.nxp.com

damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of

the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail.

No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities.

16.4 Trademarks

Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners.

For sales office addresses, please send an email to: salesaddresses@nxp.com

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18. Contents

1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 4 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 Functional description . . . . . . . . . . . . . . . . . . . 3 8 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3

9 Recommended operating conditions. . . . . . . . 4 10 Static characteristics. . . . . . . . . . . . . . . . . . . . . 4 11 Dynamic characteristics . . . . . . . . . . . . . . . . . . 5 12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 13 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9 14 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 12 15 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 12 16 Legal information. . . . . . . . . . . . . . . . . . . . . . . 13 16.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 13 16.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

16.3 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 16.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 13 17 Contact information. . . . . . . . . . . . . . . . . . . . . 13 18 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’.

© NXP B.V. 2009.

All rights reserved.

For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com

Date of release: 24 September 2009 Document identifier: 74HC_HCT2G126_4