74HC27 PHILIPS

Document overview

  • PDF pages: 5

Technical content

Page 1

PDF page 1 diagram

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FEATURES

  • Output capability: standard
  • ICC category: SSI

QUICK REFERENCE DATA

GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns

GENERAL DESCRIPTION

The 74HC/HCT27 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT27 provide the 3-input NOR function.

SYMBOL PARAMETER CONDITIONS TYPICAL UNIT
HC HCT
t / t PHL PLH propagation delay nA, nB, nC to nY C = 15 pF; V = 5 V L CC 8 10 ns
C I input capacitance 3.5 3.5 pF
C PD power dissipation capacitance per gate notes 1 and 2 24 30 pF

Notes 1. CPD is used to determine the dynamic power dissipation (PD in µW): PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fO) where: fi = input frequency in MHz fo = output frequency in MHz ∑ (CL × VCC2 × fo) = sum of outputs CL = output load capacitance in pF VCC = supply voltage in V 2. For HC the condition is VI = GND to VCC For HCT the condition is VI = GND to VCC − 1.5 V

ORDERING INFORMATION

See “74HC/HCT/HCU/HCMOS Logic Package Information”.

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PIN DESCRIPTION

PIN NO. SYMBOL NAME AND FUNCTION
1, 3, 9 2, 4, 10 13, 5, 11 7 12, 6, 8 14 1A to 3A 1B to 3B 1C to 3C GND 1Y to 3Y V CC data inputs data inputs data inputs ground (0 V) data outputs positive supply voltage
PDF page 3 diagram
PDF page 3 diagram

Fig.1 Pin configuration.

Fig.2 Logic symbol.

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PDF page 3 diagram

Fig.4 Functional diagram.

Fig.5 Logic diagram (one gate).

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Fig.3 IEC logic symbol.

FUNCTION TABLE

Column 1 Column 2 Column 3 Column 4
INPUTS OUTPUT
nA nB nC nY
L X X H L X H X L H X X H L L L

Notes 1. H = HIGH voltage level L = LOW voltage level X = don’t care

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DC CHARACTERISTICS FOR 74HC

For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”. Output capability: standard ICC category: SSI

AC CHARACTERISTICS FOR 74HC

GND = 0 V; tr = tf = 6 ns; CL = 50 pF

SYMBOL PARAMETER T (°C) amb UNIT TEST CONDITIONS
74HC V CC (V) WAVEFORMS
+25 −40 to +85 −40 to +125
min. typ. max. min. max. min. max.
t / t PHL PLH propagation delay nA, nB, nC to nY 28 10 8 90 18 15 115 23 20 135 27 23 ns 2.0 4.5 6.0 Fig.6
t / t THL TLH output transition time 19 7 6 75 15 13 95 19 16 110 22 19 ns 2.0 4.5 6.0 Fig.6

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DC CHARACTERISTICS FOR 74HCT

For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”. Output capability: standard ICC category: SSI

Note to HCT types The value of additional quiescent supply current (∆ICC) for a unit load of 1 is given in the family specifications. To determine ∆ICC per input, multiply this value by the unit load coefficient shown in the table below.

INPUT UNIT LOAD COEFFICIENT
nA, nB, nC 1.50

AC CHARACTERISTICS FOR 74HCT

GND = 0 V; tr = tf = 6 ns; CL = 50 pF

SYMBOL PARAMETER T (°C) amb UNIT TEST CONDITIONS
74HCT V CC (V) WAVEFORMS
+25 −40 to +85 −40 to +125
min. typ. max. min. max. min. max.
t / t PHL PLH propagation delay nA, nB, nC to nY 12 21 26 32 ns 4.5 Fig.6
t / t THL TLH output transition time 7 15 19 22 ns 4.5 Fig.6

AC WAVEFORMS

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(1) HC : VM = 50%; VI = GND to VCC. HCT: VM = 1.3 V; VI = GND to 3 V.

Fig.6 Waveforms showing the input (nA, nB, nC) to output (nY) propagation delays and the output transition times.

PACKAGE OUTLINES

See “74HC/HCT/HCU/HCMOS Logic Package Outlines”.