74HC241 PHILIPS

Document overview

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Technical content

Product specification File under Integrated Circuits, IC06 September 1993 INTEGRATED CIRCUITS 74HC/HCT241 Octal buffer/line driver; 3-state For a complete data sheet, please also download:

  • The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
  • The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
  • The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines

Philips Semiconductors Product specification Octal buffer/line driver; 3-state 74HC/HCT241

FEATURES

  • Output capability: bus driver
  • ICC category: MSI GENERAL DESCRIPTION The 74HC/HCT241 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT241 are octal non-inverting buffer/line drivers with 3-state outputs. The 3-state outputs are controlled by the output enable inputs 1 OE and 2OE. QUICK REFERENCE DATA GND = 0 V; Tamb =2 5°C; tr =tf= 6 ns Notes 1. C PD is used to determine the dynamic power dissipation (PD inµW): PD =C PD × VCC 2 × fi+∑ (CL × VCC 2 × fo) where: fi= input frequency in MHz fo = output frequency in MHz ∑ (CL × VCC 2 × fo) = sum of outputs C L = output load capacitance in pF VCC = supply voltage in V 2. For HC the condition is VI= GND to VCC For HCT the condition is VI= GND to VCC − 1.5 V

ORDERING INFORMATION

See “74HC/HCT/HCU/HCMOS Logic Package Information”. SYMBOL PARAMETER CONDITIONS TYPICAL UNIT HC HCT tPHL / tPLH propagation delay 1An to 1Yn; 2An to 2Yn C L = 15 pF; VCC = 5 V 7 11 ns C I input capacitance 3.5 3.5 pF C PD power dissipation capacitance per buffer notes 1 and 2 30 30 pF

Philips Semiconductors Product specification Octal buffer/line driver; 3-state 74HC/HCT241 PIN DESCRIPTION PIN NO. SYMBOL NAME AND FUNCTION

11 OE output enable input (active LOW)

2, 4, 6, 8 1A 0 to 1A3 data inputs 3, 5, 7, 9 2Y 0 to 2Y3 bus outputs

10 GND ground (0 V)

17, 15, 13, 11 2A 0 to 2A3 data inputs 18, 16, 14, 12 1Y 0 to 1Y3 bus outputs 19 20E output enable input (active HIGH) 20 V CC positive supply voltage Fig.1 Pin configuration. Fig.2 Logic symbol. Fig.3 IEC logic symbol

Philips Semiconductors Product specification Octal buffer/line driver; 3-state 74HC/HCT241 FUNCTION TABLES Note 1. H = HIGH voltage level L = LOW voltage level X = don’t care Z = high impedance OFF-state INPUTS OUTPUT OE 1A n 1Yn L L H L H X L H Z INPUTS OUTPUT 20E 2A n 2Yn H H L L H X L H Z Fig.4 Functional diagram.

Philips Semiconductors Product specification Octal buffer/line driver; 3-state 74HC/HCT241 DC CHARACTERISTICS FOR 74HC For the DC characteristics see“74HC/HCT/HCU/HCMOS Logic Family Specifications”. Output capability: bus driver ICC category: MSI AC CHARACTERISTICS FOR 74HC GND = 0 V; tr =tf= 6 ns; CL = 50 pF SYMBOL PARAMETER Tamb (°C) UNIT TEST CONDITIONS 74HC VCC (V) WAVEFORMS +25 −40 to+85 −40 to+125 tPHL / tPLH propagation delay 1An to 1Yn; 2An to 2Yn 100 125 150 ns 2.0 4.5 6.0 Fig.5 t PZH / tPZL 3-state output enable time 1OE to 1Yn; 2OE to 2Yn 150 190 225 ns 2.0 4.5 6.0 Fig.6 t PHZ / tPLZ 3-state output disable time 1OE to 1Yn; 2OE to 2Yn 150 190 225 ns 2.0 4.5 6.0 Fig.6 t THL / tTLH output transition time 14 ns 2.0 4.5 6.0 Fig.5

Philips Semiconductors Product specification Octal buffer/line driver; 3-state 74HC/HCT241 DC CHARACTERISTICS FOR 74HCT For the DC characteristics see“74HC/HCT/HCU/HCMOS Logic Family Specifications”. Output capability: bus driver ICC category: MSI Note to HCT types The value of additional quiescent supply current (ΔICC ) for a unit load of 1 is given in the family specifications. To determineΔICC per input, multiply this value by the unit load coefficient shown in the table below. AC CHARACTERISTICS FOR 74HCT GND = 0 V; tr =tf= 6 ns; CL = 50 pF INPUT UNIT LOAD COEFFICIENT 1An 2An 1OE 2OE 0.70 0.70 0.70 1.50 SYMBOL PARAMETER T amb (°C) UNIT TEST CONDITIONS 74HCT VCC (V) WAVEFORMS +25 −40 to+85 −40 to+125 tPHL / tPLH propagation delay 1An to 1Yn; 2An to 2Yn 13 22 28 33 ns 4.5 Fig.5 tPZH / tPZL 3-state output enable time 1OE to 1Yn; 2OE to 2Yn 15 30 38 45 ns 4.5 Fig.6 tPHZ / tPLZ 3-state output disable time 1OE to 1Yn; 2OE to 2Yn 18 30 38 45 ns 4.5 Fig.6 tTHL / tTLH output transition time 5 12 15 18 ns 4.5 Fig.5

Philips Semiconductors Product specification Octal buffer/line driver; 3-state 74HC/HCT241 AC WAVEFORMS Fig.5 Waveforms showing the input (1An, 2An) to output (1Yn, 2Yn) propagation delays and the output transition times. (1) HC : VM = 50%; VI= GND to VCC . HCT: VM = 1.3 V; VI= GND to 3 V. Fig.6 Waveform showing the 3-state enable and disable times for input 1OE. (1) HC : VM = 50%; VI= GND to VCC . HCT: VM = 1.3 V; VI= GND to 3 V. Fig.7 Waveform showing the 3-state enable and disable times for input 2OE. (1) HC : VM = 50%; VI= GND to VCC . HCT: VM = 1.3 V; VI= GND to 3 V.

Philips Semiconductors Product specification Octal buffer/line driver; 3-state 74HC/HCT241 PACKAGE OUTLINES See “74HC/HCT/HCU/HCMOS Logic Package Outlines”.