Download PDF74HC157_10 NXP
Document overview
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Technical content
- General description The 74HC157; 74HCT157 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL. It is specified in compliance with JEDEC standard no. 7A. The 74HC/HCT157 are quad 2-input multiplexers which select 4 bits of data from two sources under the control of a common data select input (S). The enable input (E) is active LOW. When E is HIGH, all of the outputs (1Y to 4Y) are forced LOW regardless of all other input conditions. Moving the data from two groups of registers to four common output buses is a common use of the 74HC/HCT157. The state of the common data select input (S) determines the particular register from which the data comes. It can also be used as function generator. The device is useful for implementing highly irregular logic by generating any four of the 16 different functions of two variables with one variable common. The 74HC/HCT157 is logic implementation of a 4-pole, 2-position switch, where the position of the switch is determine by the logic levels applied to S. The logic equations are: The 74HC/HCT157 is identical to the 74HC158 but has non-inverting (true) outputs. 2. Features and benefits Low-power dissipation Non-inverting data path ESD protection: HBM JESD22-A114F exceeds 2 000 V MM JESD22-A115-A exceeds 200 V Specified from 40 Ct o+ 8 5C and from 40 Ct o+ 1 2 5C 74HC157; 74HCT157 Quad 2-input multiplexer Rev. 3 — 31 December 2010 Product data sheet
Table 1. Ordering information
Product data sheet Rev. 3 — 31 December 2010 3 of 18 NXP Semiconductors 74HC157; 74HCT157 Quad 2-input multiplexer 5. Pinning information
5.1 Pinning
Fig 3. Logic symbol Fig 4. IEC logic symbol mna483 MULTIPLEXER OUTPUTSSELECTOR S 151 E 1I0 1I1 2I0 2I1 3I0 3I1 4I0 4I1 mna482 1 G1 15 EN
1 MUX
(1) This is not a supply pin. The substrate is attached to this pad using conductive die attach material. There is no electrical or mechanical requirement to solder this pad. However, if it is soldered, the solder land should remain floating or be connected to GND. Fig 5. Pin configuration DIP16, SO16, (T)SSOP16 Fig 6. Pin configuration DHVQFN16 74HC157 74HCT157 SV CC 1I0 E 1I1 4I0 1Y 4I1 2I0 4Y 2I1 3I0 2Y 3I1 GND 3Y 001aan353 001aan354 2Y 3I1 2I1 3I0 2I0 4Y GND(1) 1Y 4I1 1I1 4I0 1I0 E GND S VCC Transparent top view 7 10 6 11 5 12 4 13 3 14 2 15 terminal 1 index area 74HC157 74HCT157
5.2 Pin description
[1] P tot derates linearly with 8 mW/K above 70 C. [2] P tot derates linearly with 5.5 mW/K above 60 C. Table 2. Pin description Table 3. Function table [1] Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
[3] P tot derates linearly with 4.5 mW/K above 60 C.
- Recommended operating conditions
Table 5. Recommended operating conditions Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Table 7. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit see Figure 9.
[1] t pd is the same as tPLH and tPHL. [2] t t is the same as tTHL and tTLH. [3] C PD is used to determine the dynamic power dissipation (PD in W). (CL VCC2 fo) = sum of outputs. Table 7. Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit see Figure 9. Measurement points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load.
Measurement points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load. Table 8. Measurement points
Test data is given in Table 9. RT = Termination resistance should be equal to output impedance Zo of the pulse generator. CL = Load capacitance including jig and probe capacitance. Table 9. Test data
Product data sheet Rev. 3 — 31 December 2010 11 of 18 NXP Semiconductors 74HC157; 74HCT157 Quad 2-input multiplexer 12. Package outline Fig 10. Package outline SOT109-1 (SO16) X w M θ AA1 bp D HE Lp Q detail X E Z e c L v M A (A )3 A y pin 1 index UNIT A max. A1 A2 A3 bp cD (1) E(1) (1)eH E LL p QZ y w v θ REFERENCESOUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC JEITA mm inches 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 10.0 9.8 4.0 3.8 1.27 6.2 5.8 0.7 0.6 0.7 0.3 8 o o 0.25 0.1 DIMENSIONS (inch dimensions are derived from the original mm dimensions) Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. 1.0 0.4 SOT109-1 99-12-27 03-02-19 076E07 MS-012 0.069 0.010 0.004 0.057 0.049 0.01 0.019 0.014 0.0100 0.0075 0.39 0.38 0.16 0.15 0.05 1.05 0.0410.244 0.228 0.028 0.020 0.028 0.0120.01 0.25 0.01 0.0040.039 0.016 0 2.5 5 mm scale SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1
Product data sheet Rev. 3 — 31 December 2010 12 of 18 NXP Semiconductors 74HC157; 74HCT157 Quad 2-input multiplexer Fig 11. Package outline SOT338-1 (SSOP16) UNIT A1 A2 A3 bp cD (1) E (1) eH E LL p QZ y w v θ REFERENCESOUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC JEITA mm 0.21 0.05 1.80 1.65 0.25 0.38 0.25 0.20 0.09 6.4 6.0 5.4 5.2 0.65 1.257.9 7.6 1.03 0.63 0.9 0.7 1.00 0.55 o o0.130.2 0.1 DIMENSIONS (mm are the original dimensions) Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. SOT338-1 99-12-27 03-02-19 (1) w M bp D HE E Z e c v M A X A y 1 8 16 9 θ AA1 Lp Q detail X L (A )3 MO-150 pin 1 index 0 2.5 5 mm scale SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm SOT338-1 A max.
Product data sheet Rev. 3 — 31 December 2010 13 of 18 NXP Semiconductors 74HC157; 74HCT157 Quad 2-input multiplexer Fig 12. Package outline SOT403-1 (TSSOP16) UNIT A1 A2 A3 bp cD (1) E (2) (1)eH E LL p QZ y w v θ REFERENCESOUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC JEITA mm 0.15 0.05 0.95 0.80 0.30 0.19 0.2 0.1 5.1 4.9 4.5 4.3 0.65 6.6 6.2 0.4 0.3 0.40 0.06 o o0.13 0.10.21 DIMENSIONS (mm are the original dimensions) Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. 0.75 0.50 SOT403-1 MO-153 99-12-27 03-02-18 w M bp D Z e 0.25 16 9 θ AA1 Lp Q detail X L (A )3 HE E c v M A XA y 0 2.5 5 mm scale TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 A max. 1.1 pin 1 index
Product data sheet Rev. 3 — 31 December 2010 14 of 18 NXP Semiconductors 74HC157; 74HCT157 Quad 2-input multiplexer Fig 13. Package outline SOT763-1 (DHVQFN16) terminal 1 index area 0.51 A1 EhbUNIT ye 0.2 c REFERENCESOUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC JEITA mm 3.6 3.4 Dh 2.15 1.85 2.6 2.4 1.15 0.85 2.50.30 0.18 0.05 0.00 0.05 0.1 DIMENSIONS (mm are the original dimensions) 0.5 0.3 L 0.1 v 0.05 w 0 2.5 5 mm scale SOT763-1 DHVQFN16: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 16 terminals; body 2.5 x 3.5 x 0.85 mm A(1) max. A c detail X yy1 Ce L Eh Dh e b 15 10 X D E C B A terminal 1 index area A C C Bv M w M E(1) Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. D(1) 02-10-17 03-01-27
Table 10. Abbreviations Table 11. Revision history
- The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors.
- Legal texts have been adapted to the new company name where appropriate.
- Section 3: DHVQFN16 package added.
- Section 7: derating values added for DHVQFN16 package.
- Section 12: outline drawing added for DHVQFN16 package. 74HC_HCT157_CNV v.2 19970827 Product specification - -
Product data sheet Rev. 3 — 31 December 2010 16 of 18 NXP Semiconductors 74HC157; 74HCT157 Quad 2-input multiplexer 15. Legal information
15.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com.
15.2 Definitions
Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet.
15.3 Disclaimers
Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use in automotive applications — This NXP Semiconductors product has been qualified for use in automotive applications. The product is not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms , unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification.
Product data sheet Rev. 3 — 31 December 2010 17 of 18 NXP Semiconductors 74HC157; 74HCT157 Quad 2-input multiplexer Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities.
15.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 16. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com
NXP Semiconductors 74HC157; 74HCT157 Quad 2-input multiplexer © NXP B.V. 2010. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 31 December 2010 Document identifier: 74HC_HCT157 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. 17. Contents