74HC139 PHILIPS

Document overview

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Technical content

Product specification File under Integrated Circuits, IC06 September 1993 INTEGRATED CIRCUITS 74HC/HCT139 Dual 2-to-4 line decoder/demultiplexer For a complete data sheet, please also download:

  • The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
  • The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
  • The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines

Philips Semiconductors Product specification Dual 2-to-4 line decoder/demultiplexer 74HC/HCT139

FEATURES

  • Demultiplexing capability
  • Two independent 2-to-4 decoders
  • Multifunction capability
  • Active LOW mutually exclusive outputs
  • Output capability: standard
  • ICC category: MSI GENERAL DESCRIPTION The 74HC/HCT139 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard no. 7A. The 74HC/HCT139 are high-speed, dual 2-to-4 line decoder/multiplexers. This device has two independent decoders, each accepting two binary weighted inputs (nA 0 and nA1) and providing four mutually exclusive active LOW outputs (nY0 to nY3). Each decoder has an active LOW enable input (nE). When nE is HIGH, every output is forced HIGH. The enable can be used as the data input for a 1-to-4 demultiplexer application. The “139” is identical to the HEF4556 of the HE4000B family. QUICK REFERENCE DATA GND = 0 V; T amb = 25°C; tr = tf= 6 ns Notes 1. C PD is used to determine the dynamic power dissipation (PD inµW): PD = CPD × VCC 2 × fi+∑ (CL × VCC 2 × fo) where: fi= input frequency in MHz fo = output frequency in MHz ∑ (CL × VCC 2 × fo) = sum of outputs C L = output load capacitance in pF VCC = supply voltage in V 2. For HC the condition is VI= GND to VCC For HCT the condition is VI= GND to VCC − 1.5 V

APPLICATIONS

  • Memory decoding or data-routing
  • Code conversion

ORDERING INFORMATION

See “74HC/HCT/HCU/HCMOS Logic Package Information”. SYMBOL PARAMETER CONDITIONS TYPICAL UNIT HC HCT tPHL / tPLH propagation delay C L = 15 pF; VCC = 5 V nAn to nYn 11 13 ns nE3 to nYn 10 13 ns C I input capacitance 3.5 3.5 pF C PD power dissipation capacitance per multiplexer notes 1 and 2 42 44 pF

Philips Semiconductors Product specification Dual 2-to-4 line decoder/demultiplexer 74HC/HCT139 PIN DESCRIPTION PIN NO. SYMBOL NAME AND FUNCTION 1, 15 1 E, 2E enable inputs (active LOW) 2, 3 1A 0, 1A1 address inputs 4, 5, 6, 7 1 Y0 to 1Y3 outputs (active LOW)

8 GND ground (0 V)

12, 11, 10, 9 2 Y0 to 2Y3 outputs (active LOW) 14, 13 2A 0, 2A1 address inputs

16 V CC positive supply voltage

Fig.1 Pin configuration. Fig.2 Logic symbol. Fig.3 IEC logic symbol. (a) (b)

Philips Semiconductors Product specification Dual 2-to-4 line decoder/demultiplexer 74HC/HCT139 FUNCTION TABLE Notes 1. H = HIGH voltage level L = LOW voltage level X = don’t care INPUTS OUTPUTS n En A 0 nA 1 nY0 nY1 nY2 nY3 HXXHHHH L L L L L H L H L L H H L H H H H L H H H H L H H H H L Fig.4 Functional diagram. Fig.5 Logic diagram (one decoder/demultiplexer).

Philips Semiconductors Product specification Dual 2-to-4 line decoder/demultiplexer 74HC/HCT139 DC CHARACTERISTICS FOR 74HC For the DC characteristics see“74HC/HCT/HCU/HCMOS Logic Family Specifications”. Output capability: standard ICC category: MSI AC CHARACTERISTICS FOR 74HC GND = 0 V; tr = tf= 6 ns; CL = 50 pF SYMBOL PARAMETER Tamb (°C) UNIT TEST CONDITIONS 74HC VCC (V) WAVEFORMS +25 −40 to+85 −40 to+125 tPHL / tPLH propagation delay nAn toYn 145 180 220 ns 2.0 4.5 6.0 Fig.6 t PHL / tPLH propagation delay nE to nYn 135 170 205 ns 2.0 4.5 6.0 Fig.7 t THL / tTLH output transition time 110 ns 2.0 4.5 6.0 Figs 6 and 7

Philips Semiconductors Product specification Dual 2-to-4 line decoder/demultiplexer 74HC/HCT139 DC CHARACTERISTICS FOR HCT For the DC characteristics see“74HC/HCT/HCU/HCMOS Logic Family Specifications”. Output capability: standard ICC category: MSI Note to HCT types The value of additional quiescent supply current (ΔICC ) for a unit load of 1 is given in the family specifications. To determineΔICC per input, multiply this value by the unit load coefficient shown in the table below. AC CHARACTERISTICS FOR 74HCT GND = 0 V; tf= tf= 6 ns; CL = 50 pF INPUT UNIT LOAD COEFFICIENT 1An 2An nE 0.70 0.70 1.35 SYMBOL PARAMETER T amb (°C) UNIT TEST CONDITIONS 74HCT VCC (V) WAVEFORMS +25 −40 to+85 −40 to+125 tPHL / tPLH propagation delay nAn toYn 16 34 43 51 ns 4.5 Fig.6 tPHL / tPLH propagation delay nE to nYn 16 34 43 51 ns 4.5 Fig.7 tTHL / tTLH output transition time 7 15 19 22 ns 4.5 Figs 6 and 7

Philips Semiconductors Product specification Dual 2-to-4 line decoder/demultiplexer 74HC/HCT139 AC WAVEFORMS PACKAGE OUTLINES See “74HC/HCT/HCU/HCMOS Logic Package Outlines”. Fig.6 Waveforms showing the address input (nAn) to output (nYn) propagation delays and the output transition times. (1) HC : VM = 50%; VI= GND to VCC . HCT: VM = 1.3 V; VI= GND to 3 V. Fig.7 Waveforms showing the enable input (nE) to output (nYn) propagation delays and the output transition times. (1) HC : VM = 50%; VI= GND to VCC . HCT: VM = 1.3 V; VI= GND to 3 V.