74HC541A MOTOROLA

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Technical content

/C0077/C0079/C0084/C0079/C0082/C0079/C0076/C0065 SEMICONDUCTOR TECHNICAL DATA 3–1 REV 1 Motorola, Inc. 1995 /C0079/C0099/C0116/C0097/C0108 /C0051/C0045/C0083/C0116/C0097/C0116/C0101 /C0078/C0111/C0110/C0045/C0073/C0110/C0118/C0101/C0114/C0116/C0105/C0110/C0103 /C0066/C0117/C0102/C0102/C0101/C0114/C0047/C0076/C0105/C0110/C0101 /C0068/C0114/C0105/C0118/C0101/C0114/C0047 /C0076/C0105/C0110/C0101 /C0082/C0101/C0099/C0101/C0105/C0118/C0101/C0114 High–Performance Silicon–Gate CMOS The M C54/74HC541 A is identical in pinout to the LS541. The device inputs are compatible with Standard CMO S outputs. External pullup resistors make them compatible with LSTTL outputs. The HC541 A is an octal non–inverting buffer/line driver/line receiver designed to be used with 3–state memory address drivers, clock drivers, and other bus–oriented systems. This device features inputs and outputs on opposite sides of the package and two ANDed active–low output enables. The HC541A is similar in function to the HC540A, which has inverting outputs.

  • Output Drive Capability: 15 LSTTL Loads
  • Outputs Directly Interface to CMOS, NMOS and TTL
  • Operating Voltage Range: 2 to 6V
  • Low Input Current: 1µA
  • High Noise Immunity Characteristic of CMOS Devices
  • In Compliance With the JEDEC Standard No. 7A Requirements
  • Chip Complexity: 134 FETs or 33.5 Equivalent Gates

18 Y12A1

17 Y23A2

16 Y34A3

15 Y45A4

14 Y56A5

13 Y67A6

12 Y78A7

11 Y89A8

Non–Inverting Outputs PIN 20 = VCC PIN 10 = GND LOGIC DIAGRAM Pinout: 20–Lead Packages (Top View) 1920 18 17 16 15 14 21 3 4 5 6 7 VCC OE2 Y1 Y2 Y3 Y4 Y5 Y6 Y7 Y8 OE1 A1 A2 A3 A4 A5 A6 A7 A8 GND L L H X L L X H L H X X /C0077/C0067/C0053/C0052/C0047/C0055/C0052/C0072/C0067/C0053/C0052/C0049/C0065 FUNCTION TABLE Inputs Output Y OE1 OE2 A L H Z Z Z = High Impedance X = Don’t Care DW SUFFIX SOIC PACKAGE CASE 751D–04 N SUFFIX PLASTIC PACKAGE CASE 738–03

ORDERING INFORMATION

CASE 732–03

MOTOROLA High–Speed CMOS Logic Data DL129 — Rev 6 3–2 ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ MAXIMUM RATINGS* ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ Symbol ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Parameter ÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎ Value ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ Unit ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ VCC ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ DC Supply Voltage (Referenced to GND) ÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎ – 0.5 to + 7.0 ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ V ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ Vin ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ DC Input Voltage (Referenced to GND) ÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎ – 0.5 to VCC + 0.5 ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ V ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ Vout ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ DC Output Voltage (Referenced to GND) ÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎ – 0.5 to VCC + 0.5 ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ V ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ Iin ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ DC Input Current, per Pin ÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎ ±/n63686172000000000000000020 ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ mA ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ Iout ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ DC Output Current, per Pin ÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎ ±/n63686172000000000000000035 ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ mA ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ICC ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ DC Supply Current, VCC and GND Pins ÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎ ±/n63686172000000000000000075 ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ mA ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ PD ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Power Dissipation in Still Air, Plastic or Ceramic DIP† ÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎ 750 500 ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ mW ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ Tstg ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Storage Temperature Range ÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎ – 65 to + 150 ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ /C0095C ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ TL ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Lead Temperature, 1 mm from Case for 10 Seconds Plastic DIP or SOIC Package Ceramic DIP) ÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎ 260 300 ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ /C0095C *Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. †Derating — Plastic DIP: – 10 mW//C0095C from 65/C0095 to 125/C0095C Ceramic DIP: – 10 mW//C0095C from 100/C0095 to 125/C0095C For high frequency or heavy load considerations, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D). RECOMMENDED OPERATING CONDITIONS ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ Symbol ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Parameter ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ Min ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ Max ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ Unit ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ VCC ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ DC Supply Voltage (Referenced to GND) ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ 2.0 ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ 6.0 ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ V ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ Vin, Vout ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ DC Input Voltage, Output Voltage (Referenced to GND) ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ VCC ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ V ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ TA ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Operating T emperature Range, All Package Types ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ – 55 ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ + 125 ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ /C0095C ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ tr, tf ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Input Rise/Fall Time V CC = 2.0 V (Figure 1) V CC = 4.5 V VCC = 6.0 V ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ 1000 500 400 ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ns DC CHARACTERISTICS (Voltages Referenced to GND) VCC V Guaranteed Limit Symbol Parameter Condition VCC V –55 to 25°C ≤85°C ≤125°C Unit VIH Minimum High–Level Input VoltageVout = 0.1V |Iout| ≤ 20µA 2.0 3.0 4.5 6.0 1.50 2.10 3.15 4.20 1.50 2.10 3.15 4.20 1.50 2.10 3.15 4.20 V VIL Maximum Low–Level Input VoltageVout = VCC – 0.1V |Iout| ≤ 20µA 2.0 3.0 4.5 6.0 0.50 0.90 1.35 1.80 0.50 0.90 1.35 1.80 0.50 0.90 1.35 1.80 V VOH Minimum High–Level Output Voltage Vin = VIL |Iout| ≤ 20µA 2.0 4.5 6.0 1.9 4.4 5.9 1.9 4.4 5.9 1.9 4.4 5.9 V Vin = VIL |Iout| ≤ 3.6mA |Iout| ≤ 6.0mA |Iout| ≤ 7.8mA 3.0 4.5 6.0 2.48 3.98 5.48 2.34 3.84 5.34 2.20 3.70 5.20 VOL Maximum Low–Level Output Voltage Vin = VIH |Iout| ≤ 20µA 2.0 4.5 6.0 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 V Vin = VIH |Iout| ≤ 3.6mA |Iout| ≤ 6.0mA |Iout| ≤ 7.8mA 3.0 4.5 6.0 0.26 0.26 0.26 0.33 0.33 0.33 0.40 0.40 0.40 This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high–impedance cir- cuit. For proper operation, Vin and Vout should be constrained to the range GND /C0118 (Vin or Vout) /C0118 VCC . Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC ). Unused outputs must be left open.

Figure 3. Figure 4. OE1, OE2 (PINS 1, 19) — Output enables (active–low). outputs assume the high impedance state. ing outputs or high–impedance outputs.

High–Speed CMOS Logic Data DL129 — Rev 6 3–5 MOTOROLA OUTLINE DIMENSIONS J SUFFIX CERAMIC PACKAGE CASE 732–03 ISSUE E N SUFFIX PLASTIC PACKAGE CASE 738–03 ISSUE E DW SUFFIX PLASTIC SOIC PACKAGE CASE 751D–04 ISSUE E NOTES: 1. LEADS WITHIN 0.25 (0.010) DIAMETER, TRUE POSITION AT SEATING PLANE, AT MAXIMUM MATERIAL CONDITION. 2. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 3. DIMENSIONS A AND B INCLUDE MENISCUS. DIM MIN MAX MIN MAX INCHESMILLIMETERS A 23.88 25.15 0.940 0.990 B 6.60 7.49 0.260 0.295 C 3.81 5.08 0.150 0.200 D 0.38 0.56 0.015 0.022 F 1.40 1.65 0.055 0.065 G 2.54 BSC 0.100 BSC H 0.51 1.27 0.020 0.050 J 0.20 0.30 0.008 0.012 K 3.18 4.06 0.125 0.160 L 7.62 BSC 0.300 BSC M 0 15 0 15 N 0.25 1.02 0.010 0.040 /C0095 /C0095 /C0095 /C0095 A 1 10 B F C SEATING PLANE DH G K N J M L NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. M L J 20 PL MBM0.25 (0.010) T DIM MIN MAX MIN MAX MILLIMETERSINCHES A 25.66 27.171.010 1.070 B 6.10 6.600.240 0.260 C 3.81 4.570.150 0.180 D 0.39 0.550.015 0.022 G 2.54 BSC0.100 BSC J 0.21 0.380.008 0.015 K 2.80 3.550.110 0.140 L 7.62 BSC0.300 BSC M 0 15 0 15 N 0.51 1.010.020 0.040 /C0095 /C0095/C0095 /C0095 E 1.27 1.770.050 0.070 –A– SEATING PLANE K N FG D 20 PL –T– MAM0.25 (0.010) T E B C F 1.27 BSC0.050 BSC NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.150 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.13 (0.005) TOTAL IN EXCESS OF D DIMENSION AT MAXIMUM MATERIAL CONDITION. –A– –B– SAM0.010 (0.25) B ST D20X MBM0.010 (0.25) P10X J F G18X K C –T– SEATING PLANE M R X 45/C0095 DIM MIN MAX MIN MAX INCHESMILLIMETERS A 12.65 12.95 0.499 0.510 B 7.40 7.60 0.292 0.299 C 2.35 2.65 0.093 0.104 D 0.35 0.49 0.014 0.019 F 0.50 0.90 0.020 0.035 G 1.27 BSC 0.050 BSC J 0.25 0.32 0.010 0.012 K 0.10 0.25 0.004 0.009 M 0 7 0 7 P 10.05 10.55 0.395 0.415 R 0.25 0.75 0.010 0.029 /C0095 /C0095/C0095 /C0095

MOTOROLA High–Speed CMOS Logic Data DL129 — Rev 6 3–6 How to reach us: USA/EUROPE : Motorola Literature Distribution; JAPAN : Nippon Motorola Ltd.; T atsumi–SPD–JLDC, T oshikatsu Otsuki, P .O. Box 20912; Phoenix, Arizona 85036. 1–800–441–2447 6F Seibu–Butsuryu–Center, 3–14–2 T atsumi Koto–Ku, T okyo 135, Japan. 03–3521–8315 INTERNET : http://Design–NET .com 51 Ting Kok Road, T ai Po, N.T ., Hong Kong. 852–26629298 Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters can and do vary in different applications. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer. MC54/74HC541A/D /C0042/C0077/C0067/C0053/C0052/C0047/C0055/C0052/C0072/C0067/C0053/C0052/C0049/C0065/C0047/C0068/C0042 ◊ CODELINE