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Document overview
- Manufacturer or author: Provided By digicamel.com
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Technical content
- General description The 74HC4067; 74HCT4067 is a high-speed Si-gate CMOS device and is pin compatible with the HEF4067B. The device is specified in compliance with JEDEC standard no. 7A. The 74HC4067; 74HCT4067 is a 16-channel analog multiplexer/demultiplexer with four address inputs (S0 to S3), an active-LOW enable input (E), sixteen independent inputs/outputs (Y0 to Y15) and a common input/output (Z). The 74HC4067; 74HCT4067 contains sixteen bidirectional analog switches, each with one side connected to an independent input/output (Y0 to Y15) and the other side connected to a common input/output (Z). With pin E = LOW, one of the sixteen switches is selected by pins S0 to S3 (low impedance ON-state). All unselected switches are in the high-impedance OFF-state. With pin E = HIGH, all switches are in the high-impedance OFF-state, independent of pins S0 to S3. The analog inputs/outputs (Y0 to Y15, and Z) can swing between VCC as a positive limit and GND as a negative limit. VCC to GND may not exceed 10 V. 2. Features and benefits Low ON resistance: 80 (typical) at VCC = 4.5 V 70 (typical) at VCC = 6.0 V 60 (typical) at VCC = 9.0 V Typical ‘break before make’ built-in 3. Applications Analog multiplexing and demultiplexing Digital multiplexing and demultiplexing Signal gating 74HC4067; 74HCT4067 16-channel analog multiplexer/demultiplexer Rev. 5 — 13 December 2011 Product data sheet
Table 1. Ordering information
Product data sheet Rev. 5 — 13 December 2011 3 of 30 NXP Semiconductors 74HC4067; 74HCT4067 16-channel analog multiplexer/demultiplexer 5. Functional diagram Fig 1. Logic symbol Fig 2. IEC logic symbol 001aag725 9 Y0
810 Y1S0
Z 3 Y6 2 Y7 23 Y8 22 Y9
21 Y10
20 Y11
19 Y12
18 Y13
17 Y14
16 Y15
16 × 0 Fig 3. Schematic diagram (one switch) 001aag729 Yn Z GNDfrom logic VCC VCC
Product data sheet Rev. 5 — 13 December 2011 4 of 30 NXP Semiconductors 74HC4067; 74HCT4067 16-channel analog multiplexer/demultiplexer Fig 4. Functional diagram 001aag727 1-OF-16 DECODER 9Y 0 8Y 1 7Y 2 6Y 3 5Y 4 4Y 5 3Y 6 2Y 7 23 Y8 22 Y9
Product data sheet Rev. 5 — 13 December 2011 5 of 30 NXP Semiconductors 74HC4067; 74HCT4067 16-channel analog multiplexer/demultiplexer Fig 5. Logic diagram 001aag728 E Y10 Y11 Y12 Y13 Y14 Y15 Z
6.1 Pinning
6.2 Pin description
Table 2. Pin description
Table 3. Function table [1] Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
no limit for the voltage drop across the switch, but the voltages at Yn and Z may not exceed VCC or GND. [2] For DIP24 package: P tot derates linearly with 12 mW/K above 70 C. [3] For SO24 package: P tot derates linearly with 8 mW/K above 70 C. [4] For SSOP24 and TSSOP24 packages: P tot derates linearly with 5.5 mW/K above 60 C. [5] For DHVQFN24 package: P tot derates linearly with 4.5 mW/K above 60 C.
- Recommended operating conditions
Table 4. Limiting values …continued In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Table 5. Recommended operating conditions
recommended that these devices be used to transmit digital signals only, when using these supply voltages. Table 6. R ON resistance per switch for types 74HC4067 and 74HCT4067 VI = VIH or VIL; for test circuit see Figure 8. Vis is the input voltage at a Yn or Z terminal, whichever is assigned as an input. Vos is the output voltage at a Yn or Z terminal, whichever is assigned as an output.
Table 7. Static characteristics 74HC4067 At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Vis is the input voltage at a Yn or Z terminal, whichever is assigned as an input. Vos is the output voltage at a Yn or Z terminal, whichever is assigned as an output.
Table 7. Static characteristics 74HC4067 …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Vis is the input voltage at a Yn or Z terminal, whichever is assigned as an input. Vos is the output voltage at a Yn or Z terminal, whichever is assigned as an output.
At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Vis is the input voltage at a Yn or Z terminal, whichever is assigned as an input. Vos is the output voltage at a Yn or Z terminal, whichever is assigned as an output. Table 8. Static characteristics 74HCT4067 At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Vis is the input voltage at a Yn or Z terminal, whichever is assigned as an input. Vos is the output voltage at a Yn or Z terminal, whichever is assigned as an output.
Table 8. Static characteristics 74HCT4067 …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Vis is the input voltage at a Yn or Z terminal, whichever is assigned as an input. Vos is the output voltage at a Yn or Z terminal, whichever is assigned as an output.
Table 9. Dynamic characteristics 74HC4067 GND = 0 V; tr = tf = 6 ns; CL = 50 pF unless specified otherwise; for test circuit see Figure 14. Vis is the input voltage at a Yn or Z terminal, whichever is assigned as an input. Vos is the output voltage at a Yn or Z terminal, whichever is assigned as an output.
[1] t pd is the same as tPHL and tPLH. [2] Due to higher Z terminal capacitance (1 6 switches versus 1) the delay figures to the Z terminal are higher than those to the Y terminal. [3] t on is the same as tPHZ and tPLZ. [4] t off is the same as tPZH and tPZL. [5] C PD is used to determine the dynamic power dissipation (PD in W). Table 9. Dynamic characteristics 74HC4067 …continued GND = 0 V; tr = tf = 6 ns; CL = 50 pF unless specified otherwise; for test circuit see Figure 14. Vis is the input voltage at a Yn or Z terminal, whichever is assigned as an input. Vos is the output voltage at a Yn or Z terminal, whichever is assigned as an output.
[1] t pd is the same as tPHL and tPLH. [2] Due to higher Z terminal capacitance (1 6 switches versus 1) the delay figures to the Z terminal are higher than those to the Y terminal. [3] t on is the same as tPHZ and tPLZ. [4] t off is the same as tPZH and tPZL. [5] C PD is used to determine the dynamic power dissipation (PD in W). Table 10. Dynamic characteristics 74HCT4067 GND = 0 V; tr = tf = 6 ns; CL = 50 pF unless specified otherwise; for test circuit see Figure 14. Vis is the input voltage at a Yn or Z terminal, whichever is assigned as an input. Vos is the output voltage at a Yn or Z terminal, whichever is assigned as an output.
Measurement points are shown in Table 11. Table 11. Measurement points
[1] For 74HCT4067: maximum input voltage V I = 3.0 V. Test data is given in Table 12. RT = Termination resistance should be equal to output impedance Zo of the pulse generator. CL = Load capacitance including jig and probe capacitance. Table 12. Test data
- Additional dynamic characteristics
[1] Adjust input voltage V is to 0 dBm level (0 dBm = 1 mW into 600 ). Table 13. Additional dynamic characteristics Recommended conditions and typical values; GND = 0 V; Tamb = 25 C. Vis is the input voltage at a Yn or Z terminal, whichever is assigned as an input. Vos is the output voltage at a Yn or Z terminal, whichever is assigned as an output.
Product data sheet Rev. 5 — 13 December 2011 20 of 30 NXP Semiconductors 74HC4067; 74HCT4067 16-channel analog multiplexer/demultiplexer a. Isolation (OFF-state) b. Test circuit VCC = 4.5 V; GND = 0 V; RL = 600 ; Rsource = 1 k. Fig 16. Isolation (OFF-state) as a function of frequency 001aae332 fi (kHz) 10 10 5 106104102 103 −60 −40 −80 −20 αiso (dB) −100 0.1 μF 001aag737 VIH Z GND Yn E Vos VCC 2RL 2RL CL Vis fi dB VCC
Product data sheet Rev. 5 — 13 December 2011 21 of 30 NXP Semiconductors 74HC4067; 74HCT4067 16-channel analog multiplexer/demultiplexer a. Typical 3 dB frequency response b. Test circuit VCC = 4.5 V; GND = 0 V; RL = 50 ; Rsource = 1 k. Fig 17. 3 dB frequency response 001aag739 fi (kHz) 10 10 5 106104102 103 Vos (dB) 0.1 μF 001aag738 VIL Z dB Yn E Vos VCC 2RL 2RL CL Vis fi GND VCC
Product data sheet Rev. 5 — 13 December 2011 22 of 30 NXP Semiconductors 74HC4067; 74HCT4067 16-channel analog multiplexer/demultiplexer 14. Package outline Fig 18. Package outline SOT101-1 (DIP24) UNIT A max. 1 2 b1 cD E e MHL REFERENCESOUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC JEITA mm inches DIMENSIONS (inch dimensions are derived from the original mm dimensions) SOT101-1 99-12-27 03-02-13 A min. A max. b wMEe1 1.7 1.3 0.53 0.38 0.32 0.23 32.0 31.4 14.1 13.7 3.9 15.24 17.15 15.90 2.25.1 0.51 4 0.066 0.051 0.021 0.015 0.013 0.009 1.26 1.24 0.56 0.54 0.15 0.60 0.68 051G02 MO-015 SC-509-24 MH c (e )1 ME A L seating plane w M e D Z b E pin 1 index 0 5 10 mm scale Note 1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. Z max. (1)(1)(1) DIP24: plastic dual in-line package; 24 leads (600 mil) SOT101-1
Product data sheet Rev. 5 — 13 December 2011 23 of 30 NXP Semiconductors 74HC4067; 74HCT4067 16-channel analog multiplexer/demultiplexer Fig 19. Package outline SOT137-1 (SO24) UNIT A max. A1 A2 A3 bp cD (1) E (1) (1)eH E LL p Q Zy w v θ REFERENCESOUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC JEITA mm inches 2.65 0.3 0.1 2.45 2.25 0.49 0.36 0.32 0.23 15.6 15.2 7.6 7.4 1.27 10.65 10.00 1.1 1.0 0.9 0.4 8 o o 0.25 0.1 DIMENSIONS (inch dimensions are derived from the original mm dimensions) Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. 1.1 0.4 SOT137-1 X w M θ AA1 bp D HE Lp Q detail X E Z c L v M A (A )3 A y 0.25 075E05 MS-013 pin 1 index 0.1 0.012 0.004 0.096 0.089 0.019 0.014 0.013 0.009 0.61 0.60 0.30 0.29 0.05 1.4 0.0550.419 0.394 0.043 0.039 0.035 0.0160.01 0.25 0.01 0.0040.043 0.0160.01 e 0 5 10 mm scale SO24: plastic small outline package; 24 leads; body width 7.5 mm SOT137-1 99-12-27 03-02-19
Product data sheet Rev. 5 — 13 December 2011 24 of 30 NXP Semiconductors 74HC4067; 74HCT4067 16-channel analog multiplexer/demultiplexer Fig 20. Package outline SOT340-1 (SSOP24) UNIT A1 A2 A3 bp cD (1) E(1) (1)eH E LL p QZ y w v θ REFERENCESOUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC JEITA mm 0.21 0.05 1.80 1.65 0.38 0.25 0.20 0.09 8.4 8.0 5.4 5.2 0.65 1.257.9 7.6 0.9 0.7 0.8 0.4 o o0.13 0.10.2 DIMENSIONS (mm are the original dimensions) Note 1. Plastic or metal protrusions of 0.2 mm maximum per side are not included. 1.03 0.63 SOT340-1 MO-150 99-12-27 03-02-19 X w M θ A bp D HE Lp Q detail X E Z e c L v M A (A )3 A 11 2 24 13 0.25 y pin 1 index 0 2.5 5 mm scale SSOP24: plastic shrink small outline package; 24 leads; body width 5.3 mm SOT340-1 A max.
Product data sheet Rev. 5 — 13 December 2011 25 of 30 NXP Semiconductors 74HC4067; 74HCT4067 16-channel analog multiplexer/demultiplexer Fig 21. Package outline SOT355-1 (TSSOP24) UNIT A1 A2 A3 bp cD (1) E(2) (1)eH E LL p QZ y w v θ REFERENCESOUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC JEITA mm 0.15 0.05 0.95 0.80 0.30 0.19 0.2 0.1 7.9 7.7 4.5 4.3 0.65 6.6 6.2 0.4 0.3 o o0.13 0.10.21 DIMENSIONS (mm are the original dimensions) Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. 0.75 0.50 SOT355-1 MO-153 99-12-27 03-02-19 0.25 0.5 0.2 w M bp Z e 11 2 24 13 pin 1 index θ AA1 Lp Q detail X L (A )3 HE E c v M A XAD y 0 2.5 5 mm scale TSSOP24: plastic thin shrink small outline package; 24 leads; body width 4.4 mm SOT355-1 A max. 1.1
Product data sheet Rev. 5 — 13 December 2011 26 of 30 NXP Semiconductors 74HC4067; 74HCT4067 16-channel analog multiplexer/demultiplexer Fig 22. Package outline SOT815-1 (DHVQFN24) REFERENCESOUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC JEITA Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. SOT815-1 0 2.5 5 mm scale b yy1 C C A C C Bv M w M terminal 1 index area terminal 1 index area X UNIT A(1) max. A1 bc eEh Le1 y w v mm 1 0.05 0.00 0.30 0.18 0.5 4.5 e 1.50.2 2.25 1.95 D h 4.25 3.95 0.05 0.05 y 0.10.1 DIMENSIONS (mm are the original dimensions) 0.5 0.3 D (1) 5.6 5.4 E (1) 3.6 3.4 D E B A e DHVQFN24: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 24 terminals; body 3.5 x 5.5 x 0.85 mm A A1 c detail X Eh L Dh
Table 14. Revision history Modifications: • Legal pages updated.
Product data sheet Rev. 5 — 13 December 2011 28 of 30 NXP Semiconductors 74HC4067; 74HCT4067 16-channel analog multiplexer/demultiplexer 16. Legal information
16.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com.
16.2 Definitions
Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet.
16.3 Disclaimers
Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms , unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification.
Product data sheet Rev. 5 — 13 December 2011 29 of 30 NXP Semiconductors 74HC4067; 74HCT4067 16-channel analog multiplexer/demultiplexer Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors’ warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications.
16.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 17. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com
NXP Semiconductors 74HC4067; 74HCT4067 16-channel analog multiplexer/demultiplexer © NXP B.V. 2011. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 13 December 2011 Document identifier: 74HC_HCT4067 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. 18. Contents