74HCT373 NEXPERIA

Document overview

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Technical content

Datasheet sections

resistors to interface inputs to voltages in excess of VCC.

  • Wide supply voltage range from 2.0 V to 6.0 V
  • CMOS low power dissipation
  • High noise immunity
  • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
  • Complies with JEDEC standards:
  • JESD8C (2.7 V to 3.6 V)
  • JESD7A (2.0 V to 6.0 V)
  • Input levels:
  • For 74HC373: CMOS level
  • For 74HCT373: TTL level
  • 3-state non-inverting outputs for bus oriented applications
  • Common 3-state output enable input
  • ESD protection:
  • HBM JESD22-A114F exceeds 2000 V
  • MM JESD22-A115-A exceeds 200 V
  • Multiple package options
  • Specified from -40 °C to +85 °C and from -40 °C to +125 °C 3. Ordering information

Table 1. Ordering information

Nexperia 74HC373; 74HCT373 Octal D-type transparent latch; 3-state 4. Functional diagram 001aae050 LATCH

1 TO 8

Fig. 1. Functional diagram 001aae048 OE LE Fig. 2. Logic symbol 001aae049 11 C1 OE LE EN Fig. 3. IEC logic symbol 001aae051 LE QD LE LE LE Fig. 4. Logic diagram (one latch) 74HC_HCT373 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2021. All rights reserved Product data sheet Rev. 8 — 6 September 2021 2 / 16

Nexperia 74HC373; 74HCT373 Octal D-type transparent latch; 3-state 001aae052 D LE LE Q LATCH D LE LE Q LATCH D LE LE Q LATCH D LE LE Q LATCH D LE LE Q LATCH D LE LE Q LATCH D LE LE Q LATCH D LE LE Q LATCH LE OE Fig. 5. Logic diagram 5. Pinning information 5.1. Pinning 74HC373 74HCT373 OE VCC Q0 Q7 D0 D7 D1 D6 Q1 Q6 Q2 Q5 D2 D5 D3 D4 Q3 Q4 GND LE 001aae046 Fig. 6. Pin configuration SOT163-1 (SO20) and SOT360-1 (TSSOP20) 001aae047 74HC373 74HCT373 Transparent top view D2 D5 Q2 Q5 Q1 Q6 D1 D6 D0 D7 GND(1) GND LE OE VCC 9 12 8 13 7 14 6 15 5 16 4 17 3 18 2 19 terminal 1 index area (1) This is not a ground pin. There is no electrical or mechanical requirement to solder the pad. In case soldered, the solder land should remain floating or connected to GND. Fig. 7. Pin configuration SOT764-1 (DHVQFN20) 74HC_HCT373 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2021. All rights reserved Product data sheet Rev. 8 — 6 September 2021 3 / 16

Table 2. Pin description Table 3. Functional description X = don’t care; Z = high-impedance OFF-state. Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). [1] For SOT163-1 (SO20) package: Ptot derates linearly with 12.3 mW/K above 109 °C. For SOT360-1 (TSSOP20) package: Ptot derates linearly with 10.0 mW/K above 100 °C. For SOT764-1 (DHVQFN20) package: Ptot derates linearly with 12.9 mW/K above 111 °C.

  1. Recommended operating conditions

Table 5. Recommended operating conditions Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V).

Table 7. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit see Fig. 12.

Nexperia 74HC373; 74HCT373 Octal D-type transparent latch; 3-state Tamb = 25 °C Tamb = -40 °C to +85 °C Tamb = -40 °C to +125 °C Symbol Parameter Conditions Min Typ Max Min Max Min Max Unit OE to Qn; see Fig. 10 [2] VCC = 2.0 V - 44 150 - 190 - 225 ns VCC = 4.5 V - 16 30 - 38 - 45 ns ten enable time VCC = 6.0 V - 13 26 - 33 - 38 ns OE to Qn; see Fig. 10 [3] VCC = 2.0 V - 47 150 - 190 - 225 ns VCC = 4.5 V - 17 30 - 38 - 45 ns tdis disable time VCC = 6.0 V - 14 26 - 33 - 38 ns Qn; see Fig. 8 and Fig. 9 [4] VCC = 2.0 V - 14 60 - 75 - 90 ns VCC = 4.5 V - 5 12 - 15 - 18 ns tt transition time VCC = 6.0 V - 4 10 - 13 - 15 ns LE HIGH; see Fig. 9 VCC = 2.0 V 80 17 - 100 - 120 - ns VCC = 4.5 V 16 6 - 20 - 24 - ns tW pulse width VCC = 6.0 V 14 5 - 17 - 20 - ns Dn to LE; see Fig. 11 VCC = 2.0 V 50 14 - 65 - 75 - ns VCC = 4.5 V 10 5 - 13 - 15 - ns tsu set-up time VCC = 6.0 V 9 4 - 11 - 13 - ns Dn to LE; see Fig. 11 VCC = 2.0 V +5 -8 - 5 - 5 - ns VCC = 4.5 V +5 -3 - 5 - 5 - ns th hold time VCC = 6.0 V +5 -2 - 5 - 5 - ns CPD power dissipation capacitance per latch; VI = GND to VCC [5] - 45 - - - - - pF 74HCT373 Dn to Qn; see Fig. 8 [1] VCC = 4.5 V - 17 30 - 38 - 45 ns VCC = 5 V; CL = 15 pF - 14 - - - - - ns LE to Qn; see Fig. 9 VCC = 4.5 V - 16 32 - 40 - 48 ns tpd propagation delay VCC = 5 V; CL = 15 pF - 13 - - - - - ns ten enable time OE to Qn; VCC = 4.5 V; see Fig. 10 [2] - 19 32 - 40 - 48 ns tdis disable time OE to Qn; VCC = 4.5 V; see Fig. 10 [3] - 18 30 - 38 - 45 ns tt transition time Qn; VCC = 4.5 V; see Fig. 8 and Fig. 9 [4] - 5 12 - 15 - 18 ns 74HC_HCT373 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2021. All rights reserved Product data sheet Rev. 8 — 6 September 2021 7 / 16

Nexperia 74HC373; 74HCT373 Octal D-type transparent latch; 3-state Tamb = 25 °C Tamb = -40 °C to +85 °C Tamb = -40 °C to +125 °C Symbol Parameter Conditions Min Typ Max Min Max Min Max Unit tW pulse width LE HIGH; VCC = 4.5 V; see Fig. 9 16 4 - 20 - 24 - ns tsu set-up time Dn to LE; VCC = 4.5 V; see Fig. 11 12 6 - 15 - 18 - ns th hold time Dn to LE; VCC = 4.5 V; see Fig. 11 4 -1 - 4 - 4 - ns CPD power dissipation capacitance per latch; VI = GND to (VCC - 1.5 V) [1] tpd is the same as tPLH and tPHL. [2] ten is the same as tPZH and tPZL. [3] tdis is the same as tPLZ and tPHZ. [4] tt is the same as tTHL and tTLH. [5] CPD is used to determine the dynamic power dissipation (PD in μW). PD = CPD × VCC 2 × fi × N + Σ(CL × VCC 2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; Σ(CL × VCC 2 × fo) = sum of outputs. 10.1. Waveforms and test circuit 001aae082 Dn input Qn output VM tPLH tPHL tTHLtTLH VM 90 % 10 % Measurement points are given in Table 8. Fig. 8. Propagation delay input (Dn) to output (Qn) and transition time output (Qn) VM VM tPLHtPHL tW LE input Qn output 001aae083 tTLHtTHL 90 % 10 % Measurement points are given in Table 8. Fig. 9. Pulse width latch enable input (LE), propagation delay (LE) to output (Qn) and transition time output (Qn) 74HC_HCT373 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2021. All rights reserved Product data sheet Rev. 8 — 6 September 2021 8 / 16

Measurement points are given in Table 8. Measurement points are given in Table 8. Table 8. Measurement points

Test data is given in Table 9. Table 9. Test data

Nexperia 74HC373; 74HCT373 Octal D-type transparent latch; 3-state 11. Package outline UNIT A max. A 1 A 2 A 3 b p c D (1) E (1) (1) e H E L L p Q Z y w v θ REFERENCES OUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC JEITA mm inches 2.65 0.3 0.1 2.45 2.25 0.49 0.36 0.32 0.23 13.0 12.6 7.6 7.4 1.27 10.65 10.00 1.1 1.0 0.9 0.4 8 o o 0.25 0.1 DIMENSIONS (inch dimensions are derived from the original mm dimensions) Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. 1.1 0.4 SOT163-1 w M b p detail X Z e D y 0.25 075E04 MS-013 pin 1 index 0.1 0.012 0.004 0.096 0.089 0.019 0.014 0.013 0.009 0.51 0.49 0.30 0.29 0.05 1.4 0.055 0.419 0.394 0.043 0.039 0.035 0.016 0.01 0.25 0.01 0.004 0.043 0.016 0.01 0 5 10 mm scale X θ A A 1 A 2 H E L p Q E c L v M A (A ) 3 A SO20: plastic small outline package; 20 leads; body width 7.5 mm SOT163-1 99-12-27 03-02-19 Fig. 13. Package outline SOT163-1 (SO20) 74HC_HCT373 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2021. All rights reserved Product data sheet Rev. 8 — 6 September 2021 11 / 16

Nexperia 74HC373; 74HCT373 Octal D-type transparent latch; 3-state UNIT A 1 A 2 A 3 b p c D (1) E (2) (1) e H E L L p Q Z y w v θ REFERENCES OUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC JEITA mm 0.15 0.05 0.95 0.80 0.30 0.19 0.2 0.1 6.6 6.4 4.5 4.3 0.65 6.6 6.2 0.4 0.3 0.5 0.2 o o 0.13 0.1 0.2 1 DIMENSIONS (mm are the original dimensions) Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. 0.75 0.50 SOT360-1 MO-153 99-12-27 03-02-19 w M b p D Z e 0.25 1 10 20 11 pin 1 index θ A A 1 A 2 L p Q detail X L (A ) 3 H E E c v M A X A y 0 2.5 5 mm scale TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm SOT360-1 A max. 1.1 Fig. 14. Package outline SOT360-1 (TSSOP20) 74HC_HCT373 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2021. All rights reserved Product data sheet Rev. 8 — 6 September 2021 12 / 16

Nexperia 74HC373; 74HCT373 Octal D-type transparent latch; 3-state ReferencesOutline version European projection Issue date IEC JEDEC JEITA sot764-1_po 03-01-27 14-12-12 Unit mm max nom min 0.5 3.5 0.1 A(1) Dimensions (mm are the original dimensions) Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. A1 b 0.30 c D(1) Dh E(1) Eh 1.00 e e1 L 0.4 v w 0.05 y y1 1.15 0.5 detail X B A e e C yCy1 X AC Bv Cw scale A c L Eh Dh b 2 9 19 12 101 D E terminal 1 index area terminal 1 index area 0 5 mm2.5 DHVQFN20: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 20 terminals; body 2.5 x 4.5 x 0.85 mm SOT764-1 Fig. 15. Package outline SOT764-1 (DHVQFN20) 74HC_HCT373 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2021. All rights reserved Product data sheet Rev. 8 — 6 September 2021 13 / 16

Table 10. Abbreviations Table 11. Revision history Modifications: • Type number 74HC373DB (SOT339-1/SSOP20) removed.

  • Legal texts have been adapted to the new company name where appropriate.
  • Type number 74HCT373DB (SOT339-1/SSOP20) removed.
  • Table 4: Derating values for Ptot total power dissipation updated. 74HC_HCT373 v.6 20160226 Product data sheet - 74HC_HCT373 v.5 Modifications: • Type numbers 74HC373N and 74HCT373N (SOT146-1) removed. 74HC_HCT373 v.5 20111213 Product data sheet - 74HC_HCT373 v.4 Modifications: • Legal pages updated. 74HC_HCT373 v.4 20100903 Product data sheet - 74HC_HCT373 v.3 74HC_HCT373 v.3 20060120 Product data sheet - 74HC_HCT373_CNV v.2 74HC_HCT373_CNV v.2 19970827 Product specification - - 74HC_HCT373 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2021. All rights reserved Product data sheet Rev. 8 — 6 September 2021 14 / 16

Nexperia 74HC373; 74HCT373 Octal D-type transparent latch; 3-state 14. Legal information Data sheet status Document status [1][2] Product status [3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term 'short data sheet' is explained in section "Definitions". [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the internet at https://www.nexperia.com. Definitions Draft — The document is a draft version only. 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In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without Nexperia’s warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond Nexperia’s specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies Nexperia for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond Nexperia’s standard warranty and Nexperia’s product specifications. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 74HC_HCT373 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2021. All rights reserved Product data sheet Rev. 8 — 6 September 2021 15 / 16