54F2620 NSC
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~ No = ah ZaNational Maeve | OT Semiconductor On op oN 54F/74F2620 e 54F/74F2623 aD Inverting Octal Bus Transceiver ye . . . . e with 252 Series Resistors in the Outputs Bon General Description Features on These devices are octal bus transceivers designed for asyn- ™ 252 series resistors in the outputs eliminate the need | Ni chronous two-way data flow between the A and B busses. for external resistors. s > These devices are functionally equivalent to the 'F620 and im Designed for asynchronous two-way data flow between Nn "F623. The 250 series resistors in the outputs reduce ring- busses 4 o ing and eliminate the need for external resistors. Both bus- = Outputs sink 12 mA and source 15 mA On ses are capable of sinking 12 mA, sourcing 15 mA, and Dual enable inputs control direction of data flow O° eo pave TALSTATE outputs. Dual enable pins (GAS. GBA) al. w Guaranteed 4000V minimum ESD protection es low isi us to the B bus or from : se ani ; the B bus to the A bus. The 'F2620 is an inverting option of 2620 is an inverting option of the 'F2623 ss $ the 'F2623. cr a —CT s (vo Logic Symbol Connection Diagrams 9 Pin Assignment for Dp SoBe Bs By By DIP, SOIC and Flatpak = a, ie] O} ea capt 20}-Vee c GAB ho? 19; Gea o fom oe he, > ass 16-8, Ss TUF /10628-1 Ae 156; Q . . Agr ube, Unit Loading/Fan Out cde iste, ®, 6 5 54F/74F as 12-8. $ GND—F10 TPB; Description UL. Input h/t 7 = HIGH/LOW | Output lon/loL TUF/ 1082-2 =. GBA, GAB Enable Inputs 1.0/1.0 20 pA/—0.6 mA i Ag-A7 A Inputs or 3.5/0.667 70 pA/—0.4 mA Pin Assignment TRI-STATE Outputs 750/20 15 mA/12 mA for LCC i Bo-B7 B Inputs or 3.5/0.667 70 pA/—0.4 mA Me As Ay As Ap TRI-STATE Outputs 750/20 15 mA/12 mA So0eao 478) Oa nD Dry 8, Dos 8,2 BV oe 85 Ga OOO foe By Bs Bp 8, B TUF /10628- i FAST® and TRI-STATE® are registered trademarks of National Semconductor Corporation | ®1990Nationa Semiconductor Corporation TL/F/10608 ! ARO-B20M120/PontedinU S.A
The enable inputs GAB and GBA control whether data is Function Table transmitted from the A bus to the B bus or from the B bus to [Enable inputs | Operation _—_—_—«| the A bus. If both GBA and GAB are disabled (GBA HIGH Operation and GAB low), the outputs are in the high impedance state GBA SAB | ‘F2e20 | —Fae23—i| and data is stored at the A and B busses. When GBA is = active (LOW), B data is sent to the A bus. When GAB is B Data toA Bus | B Data to A Bus active (HIGH), data from the A bus is sent to the B bus. If Data to B Bus | A Data to B Bus both enable inputs are active (GBA LOW and GAB HIGH) B data is sent to the A bus while A data is sent to the B bus. L H B Data to A Bus, | B Data to A Bus, A Data to B Bus | A Data to B Bus H = HIGH Voltage Level L = LOW Voltage Level Z = High Impedance Logic Diagram "F2620 B Lt 8 Bs & 85 8, & Z\\ A Ta AB % Ay Cs As y Ms % ” TLIF/10628-4 Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. "F2623 8% 5 % 8 % 4 % % [| pel Dal pal pa pal pal H AA LO L] LI LC LJ LI Ld eA GAB % A My As M as Ms yy TUF/10628-5 Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
Absolute Maximum Ratings (note 1) If Military/Aerospace specified devices are required, Voltage Applied to Output please contact the National Semiconductor Sales in HIGH State (with Voc = OV) Office/Distributors for availability and specifications. Standard Output —0.5V to Veco Storage Temperature —65°C to + 150°C TRISTATE Output —0.5V to +5.5V Ambient Temperature under Bias —55°C to + 125°C Current Applied to Output Junction Temperature under Bias =55°C to + 175°C in LOW State (Max) twice the rated Io, (mA) Vou Pin Potential to ESD Last Passing Voltage (Min) 4000V Ground Pin ~0.5V to +7.0V . Input Voltage (Note 2) -0.5V to +7.0V Recommended Operating Input Current (Note 2) ~30 mA to +5.0 mA Conditions Note 1: Absolute maximum ratings are values beyond which the device may Free Air Ambient Temperature be damaged or have its useful life impaired. Functional operation under Military —55°C to + 125°C these conditions isnot implied Commercial O°C to + 70°C Note 2: Either voltage {imit or current limit is sufficient to protect inputs. Supply Voltage Military +4.5V to +5.5V Commercial +4.5V to +5.5V Symbol SAF/TAF Conditions Min Typ Max Vin Input HIGH Voltage [20 sv |__| Recognizedas a HIGH Signal Vin Input LOW Voltage [os | v | | Recognized as a LOW Signal Veo Input Clamp Diode Voltage [a2 | v_| Min | ty = —18 ma (Non 1/0 Pins) Vou Output HIGH 54F 10% Voc lon = —12 mA (An, Bn) Voltage 74F 10% Voc v lod = —15 mA (An, Bn) Vor Output LOW o5 | y lou = 1.0 mA (An, Bn) Voltage 0.75 lou = 12 MA (An, Bn) a Input HIGH 54F _ ’ ont oie BA Vin = 2.7V (Non 1/0 Pins) ow Input HIGH Current 54F 400 _ : Breakdown Test 74F zo | HA Vin = 7.0V (Non I/O Pins) lavit Input HIGH Current 54F 10 _ Breakdown Test (\\/O) _74F os | ™ Vin = 5.5V (An, Bn) Ioex Output HIGH 54F _ Leakage Current 74E BA Vou = Voc Vio Input Leakage lp = 1.9 2A Test 74F 475 v All Other Pins Grounded lop Output Leakage Vion = 150 mV . A Circuit Current mar 378 | All Other Pins Grounded fn | inputtow Curent | 06 | ma | Max | vin = 0.8V (Non /0 Pins) liu + loz | Output Leakage Current [| 70 |p _| Max | Vour= 27V (An Br) li. + loze_| Output Leakage Current [| 650 | wa _| Max | Vour = 0.5V (An, Ba) los Output Short-Circuit Current —100 =225 | ma | Max | Vour = ov tz Bus Drainage Test | 500 Tua | ov | Vour = 5.25 locH Power Supply Current ('F2620) | be _| ma _| Max | Vo= HIGH, Vin = 0.2V Io Power Supply Current ('F2620) | ——62_|_mé | Max | Vo=LOW looz Power Supply Current ('F2620) [98 | ~mé | Max | Vo=HIGHZ IocH Power Supply Current ('F2623) | | ~mé | Max | Vo=HIGH Icou Power Supply Current ('F2623) [| mA _| Max | Vo = LOW, Vin = 0.2V locz Power Supply Current ('F2623) [8 -| =a | Max | Vo=HIGHZ
Ta = +25°C _ _ Symbol Voc = +5.0V ™ Veo © uu Ta Voc = Com Units C. = 50 pF L pl L pl Min Typ Max [ Min Max | Min Max _| tpLH Propagation Delay 25 75 2.0 8.0 ns tee A Input to B Output (F2620) 3.0 8.0 3.0 8.0 teu Propagation Delay 25 75 2.0 8.0 ns teHL B Input to A Output ('F2620) 3.0 8.0 3.0 8.0 tPLH Propagation Delay 1.5 6.5 15 75 ns teHL A Input to B Output (’F2623) 25 75 25 8.0 fey Propagation Delay 15 65 15 75 ns teHL B Input to A Output (’F2623) 25 75 25 8.0 tezH Enable Time 2.0 7.0 2.0 8.0 tp2e GBA Input to A Output 25 8.0 2.0 85 ns tpuz Disable Time 15 75 tpiz GBA Input to A Output 1.0 55 tpZH Enable Time 2.0 75 2.0 8.5 tezi GAB Input to B Output ('F2620) | 3.0 8.0 2.0 85 hs tpHz Disable Time 25 8.0 2.0 9.0 teLz GAB Input to B Output ('F2620) | 2.0 75 20 8.0 tpzH Enable Time 2.0 75 20 8.5 tezi GAB Input to B Output ('F2623) | 2.5 8.0 2.0 8.5 ns tpuz Disable Time 20 8.0 2.0 9.0 teiz GAB Input to B Output (’F2623) 2.0 8.0 2.0 8.0 Basic FAST Circuit Showing Series Resistor Placement po : _ DEL. NJ B | ' Rg = 250. > TL/F/10628-6
Ordering Information
The device number is used to form part of a simplified purchasing code where a package type and temperature range are defined as follows: 74F 2620/2623 P C OR Temperature Range Family —__]T L Special Variations 74F = Commercial FAST X = Devices shipped in 13” reels 54F = Military FAST QR = Commercial grade device with h burn-in Device Type QB = Military grade device with Package Code environmental and burn-in P = Plastic DIP Processing shipped in tubes D = Ceramic DIP . Temperature Range S = Small Outline (SOIC) C = Commercial (0°C to + 70°C) M = Military (—55°C to + 125°C) Physical Dimensions inches (mitimeters) 0.985 (0.635) MAX | mo feo) [+s) fre] [o7} fo) [rs] [v4] fo3] [re] fg 0220-0310 _% (5.588 - 7.874) -p OIRO IOIOIC 0.005 — 0.020 {0.127 --0.508) ‘RAD TYP 0.037 + 0.005 i" (0.940 + 0.127) 9.005 0.055 40,005 sr 7.3668 =| GLASS SEALANT. IN (0-508 =1.524) ee 0.200 4 . i ee p<. 5 HH HUW OB Od “ux | (3.810) TOS wel ass ‘i (1786.8) os10-o40 | 0.060 0.018 + 0.003 [4 ascose aa 10.41) in526) arse ofl MAX BOTH ENDS 0.100 0.010 i (2.540 + 0.254) evn 20-Lead Ceramic Dual-In-Line Package (D) i
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~~ 20-Lead Small Outline Integrated Circuit (S) o Na Ocoee SL 66 LL i ame ae nao < en ako) (on J ya ornon reo —t ao ° |aaw.a _. Lass orion 2386 180 010 eruon ro ams an] [Gay] PMG a ta °o ame ad \\ [ g \\ ! a ~ 4 05 0700 i i ae-som N Tas rel cmso0) inwe TY uw | ; eae erosoo0 || || 0125-0150, a! sesoon |, 1 125-0058 iasoH iano) uw +t nesses w 20-Lead Plastic Dual-In-Line Package (P) LIFE SUPPORT POLICY NATIONAL'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life systems which, (a) are intended for surgical implant support device or system whose failure to perform can into the body, or (b) support or sustain life, and whose be reasonably expected to cause the failure of the life failure to perform, when properly used in accordance support device or system, or to affect its safety or with instructions for use provided in the labeling, can effectiveness. be reasonably expected to result in a significant injury : 7 to the user. Seen oe FA ‘National Semiconductor ‘National Semiconductor National Semiconductor National Semiconductor National Semicondutores: National Semiconductor Corporation GmbH Japan Lid. Hong Kong Ltd. Do Brasil Lida. (Australia) PTY, Ltd. 2500 Someonductor Dive Industrestrase 10 Sansoio Bldg SF Soto S19, 3h Floor Av. Bg. Fana Lima, 1960 Ist oer 441 St ka Pe
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