7473

7473 ETC

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Signetics 7473, LS73 Flip-Flops Dual J-K Flip-Flop Product Specification Logic Products DESCRIPTION TYPICAL fy TYPICAL SUPPLY CURRENT The '73 is @ dual flip-lop with individual MAX (Tora) J, K, Clock and direct Reset inputs. The 7473s positive pulse-tiggered. JK infor- soeie the Clock is HIGH and transferred to the slave on the HIGH-to-LOW transition. ORDERING CODE For the 7473, the J and K inputs should COMMERCIAL RANGE be stable while the Clock is HIGH for PACKAGES - ens 1 ‘The 7473 is a negative edge-triggered Plastic DIP __N7A7aN, N74LS73N_ | stable one set-up time prior to the HIGH- £2 formation regarding devcws processed 10 Millay Specifications Stoneics Miltary Products to-LOW Clock transition for predictable operation. INPUT AND OUTPUT LOADING AND FAN-OUT TABLE Tra Past o's an aacvonos [ps [—wesoneron [re | ras ages the Close ahd Data inputs, tore [| Cookman | rides the Clock and Data inputs, forcing Clock input Su tre caput LOW ond tm out (Re | Rowtip [av | aa] [ea oes ft) NOTE: ‘Where a 74 unit load (us understood to be 40pA hyjand—1.6mA i. anda TALS unt oad (LSU is 204A ly and ~0.4mA ly, PIN CONFIGURATION LOGIC SYMBOL LOGIC SYMBOL (IEE/IEC) *LS73 73 “LS73 uf apa fa eps rer, thoy «f, “ &, oy fa, tte, TP? a 2 fo: a3, 2fe mo ays fe A ab ca ee Lis Yee FH [i ono 3 oh, : or, GI [73} «2 2 1 sey aE ossh 2 i [3] 02 6 2 Bow aK * iw 2@ oLn Afar apts ofa, 88 aap Sol y Sn some cd «. da se a fo ee ee es j i : December 4, 1985 5-99 859-0565 81501

Signetics Logic Products Product Specification Flip-Flops 7473, S73 LOGIC DIAGRAM FUNCTION TABLE oreraring MODE eaancics ° a ‘Asynchronous reset tt x Ixixlcla (Clear) - ji Toggle H} ND {nj} ajg ° Load "0" (Reset) H] SU Jt}h} cya * a Load "1" (Set) H nh hol H L Hold “no change” H/}| DM Jililala L H = HIGH voltage level steady state. bd hh = HIGH voltage level one setup time prior to the HIGH-to-LOW Clock wearres transition." L = LOW voltage level steady state. | LOW votage level one setup te prior to the HIGHLo-LOW Clock transition." Lower case letters indicate the state of the referenced output prior to th HIGH1o-LOW Clock transition. X =Don't care SL = Positive Clock pulse. NOTES: 1. Tho J and K inputs of tho 7473 must bo stable wiilo the Ciock is HIGH for conventional operation. 2 Tho 74LS73 is edge triggered. Data must be stable one set-up time Prior fo the negative edge of the Clock for predictable operation ABSOLUTE MAXIMUM RATINGS (Over operating free-air temperature range unless otherwise noted.) Va Sap vaage [Tin totems —SCSCS~S~S~—S wes | oe | ait Vola spied aap GH wap Bas Ta Opeiing - onpute age RECOMMENDED OPERATING CONDITIONS Vez Sino vane [ars [so [sz [ars [ so [sz |v _| Va__LOWAoel pu vege ee a lor Rhee mp earn [eee || lox LOW level output curent { of fw ff fe [im | December 4, 1985 5-100

Signetics Logic Products Product Specification Flip-Flops 7473, LS73 DC ELECTRICAL CHARACTERISTICS (Over recommended operating free-air temperature range unless otherwise noted.) esr conomonss |e tars] | win [ tye? [ wax | win | Tye? [ wax | Sen eet Vax tow ouput votage | Yorn [tazwax | [oe [oa | [oas | os |v | | vic tout came votoge [| VecoMN =e «| | vs | if | 8 |v [vessv [arm [ [|v f | [| ma | |. put carat at mex |v any [a xinoas | [Por [om Oc pose Pee [teh a [a keows | | [ref [loa [ma | ee dd Veo= MAK Dp Pe Te ps To] NOTES aos shown 2s MN oc MAK, 12 he aot abe speed ude ecmended opting cantons fhe appeal 9p. See ee eee a xc ay. Not moran one ut aol be sri ae nd abn lh tho cc hu et ta teat ie 4, With the Clock input grounded and all outputs open, ioc is measured with the Q and G outputs HIGH in tum. AC ELECTRICAL CHARACTERISTICS 1, = 25°C, Voc = 5.0V ome rome | | | [ax Mariam dock fowony | Wavioms | 8 | | of || fe eeee ue) Pe |e | | teu Clock to output Wavetorm 3, ‘73 [se Ray] vmwme [| | MOTE converton, un te wrt ase ve oo mannan dvce cprang faq wih no consti on ps we or ty ol December 4, 1985 5-101

Signetics Logic Products Product Specification Flip-Flops 7473, S73 AC SET-UP REQUIREMENTS 1,~ 25°C, Voc= 5.0V [ito Gecko wan waar | Wawioms [a [PP [wir ceo pave wa om | wawtems | a? | | | id | [iw Rose pose wah (ow) | Wawom@ [as +) ||| [5 Set tne Jor Ke Goo] Waveiom i | 0 | +4 |i | [a Has tne Jere Goce | wewoms |e [|e |_| | AC WAVEFORMS onl YYYYyyy’ WH] a= ‘imo _ to. Nt we RESET ip) wa fu e Vw Vu Yu te ‘PHL PH - Li tun a tea 5 Co ean et eee a ah See seo tre ge nen $s} ne — on ve vu | * 1 TPM bere ° Va vu mr] a L Vee Ve For al waveloms, Vu 1. for 745; Vy= 15 for al othr TT. tami “ho shaded areas icate shen i put parma fo crange for redicabie ov perfomance Waveform 3. Propagation Delay and fuax December 4, 1985 5-102

Signetics Logic Products Product Specification Flip-Flops 7473, LS73 TEST CIRCUITS AND WAVEFORMS = 1w a AMP “ee weanve | ¥# vw PULSE " 10% 10%) w we Your [oct2son | e+ frautn ‘rent " TUM ITHUtD- a0 Yo ; ao - ame on posirive rt 434 puss | Lum vw 10%. w 20% 4y Wee 130 for 74.8; Y= 15 fr a ot TTL ares. Test Circult For 74 Totem-Pole Outputs: Input Pulse Definition R= loud reomer 10 Voc eo AC CHARACTERISTICS for va. INPUT PULSE REQUIREMENTS “ foc: 900 Ri Sea eae 6 Soe [i | aa | [i tee AC CHARACTERISTICS for vaive y= Terinaon resistance shoud be equal 10 Zour |_7 [ov | iweiz | soon | ns | 7ns | of Pulse Generators. 1D Choos are TNO18, TNO, or curser | zs | aov | tmz | soons | 16s ens | 5 true ta Volos shoud be less than o egal 1 the abe tray [_soons [ans | 26ns | December 4, 1985 5-103