67SMO WK

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Low Voltage Differential Signaling Oscillators

67SMO (+2.5V or +3.3V FIXED LVDS MODELS)

STANDARD SMD CLOCK OSCILLATORS

67SMO

STANDARD SPECIFICATIONS

LVDS

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Item Specifications
Generic part number 67SMO※1
Frequency range 80.000 MHz to 300.000 MHz
Frequency stability (0˚C to +70˚C) over all conditions 67SMO(A) : ±100 ppm 67SMO(B) : ±50 ppm 67SMO(C) : ±30 ppm 67SMO(D) : ±25 ppm
Operating Conditions Operating temperature Input voltage (VDD) Stand-by control voltage (Pin#1) 0˚C to +70˚C +2.5V DC ±5% or +3.3V DC ±5% VIH : 70%VDD min. VIL : 30%VDD max.※2
Absolute Max. Ratings Supply voltage Storage temperature -0.5V to +5.0V DC -50˚C to +125˚C
Input current (Pin#1 = Open or VIH) 70 mA max.
Stand-by current (Pin#1=VIL) 30μA max.
Output (0˚C to +70˚C) Symmetry Rise and fall times "0" level "1" level Load 45% to 55% (at crossing point) 1 ns max. (20% to 80% of amplitude) VOL : +1.10V, Typical VOH : +1.43V, Typical 100Ω (OUT-OUTN)
Differential output voltage 0.33V, Typical
Offset voltage 1.25V, Typical
Disable delay time 200 ns max.
Enable delay time 10 ms max.
Startup time 10 ms max.
RMS jitter (12 kHz to 20 MHz band) 1 ps max.
Aging ±5 ppm max. at +25˚C ±3˚C for first year
Reflow condition +250˚C ±10˚C for 10 seconds +170˚C ±10˚C for 1 to 2 minutes (preheating)

67SMO

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PIN CONNECTION 1 "L" OPEN or "H" 2 N.C. 3 GND 4 Z OUTPUT Z C-OUTPUT 5 6 VDD Z : high impedance

OUTPUT WAVEFORM

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(※1) Final exact part number to be determined with frequency, frequency stability and input voltage. e.g. 67SMO(3.3VC) 164.355 MHz. (※2) Internal crystal oscillation to be halted (Pin #1=VIL).

Symmetry=t/T×100(%)

PACKAGE DATA

Package Item 67SMO
Lid Metal
Base Ceramic
Sealing Seam
Terminal Tungsten (metalized)
Terminal plating Gold / Nickel (surface) / (under)
RoHS Compliant (Pb-free)

TEST CIRCUIT

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TAPE SPECIFICATIONS

SOLDERING PATTERN

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A B C D F J L M R eel Dia. Qty/Reel
7.5 5.5 1 6.0 7.5 8.0 2.0 0.3 2.2 245 1000pcs