5816

5816 ALLEGRO

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Technical content

4-TO-16 LINE LATCHED DECODER/DRIVERS DISCONTINUED PRODUCT — FOR REFERENCE ONLY GROUND GROUND OUTPUT ENABLE LOGIC SUPPLY STROBE CHIP ENABLE DIODE COMMON 0-7 OUT 0 OUT 5 OUT 6 OUT 10 15OUT 11OUT DIODE COMMON 8-15 INA INB INC IND K K ST LATCHES DECODER V DD OE OUT 1 OUT 2 OUT 3 OUT 4 14OUT 13OUT 12OUT OUT 7 OUT 8 OUT 9 Dwg. PP-030 The UCN5816A and UCN5816EP 4-to-16 line latched decoder/ drivers combine low-power CMOS inputs and logic with 16 high- current, high-voltage bipolar outputs. The CMOS inputs cause minimal loading and are compatible with standard CMOS, PMOS, and NMOS logic. TTL or DTL circuits may require the use of appropriate pull-up resistors to ensure an input logic high. The logic operates over a supply range of 5 V to 12 V. A CHIP ENABLE function can be used with two devices for 5-to-32 line decoding applications. The 16 bipolar power outputs are open-collector 60 V Darlington drivers capable of sinking 350 mA continuously. Internal transient- suppression diodes provide protection for use with inductive loads. For ink-jet printer applications, the A5817SEP addressable 28-line decoder/driver is recommended. The UCN5816A is supplied in a 28-pin dual in-line plastic package with 0.600" (15.24 mm) row spacing. The UCN5816EP is furnished in a 28-lead plastic chip carrier (quad pack) for minimum-area surface- mount applications. Both devices will drive 350 mA loads continuously over the full operating temperature range.

FEATURES

n 60 V Minimum Output Breakdown n CMOS, PMOS, NMOS, TTL Compatible Inputs n Low-Power CMOS Logic and Latches n Output Transient Protection n Output Enable and Strobe Functions 5816 UCN5816EP 4-TO-16 LINE LATCHED DECODER/DRIVERS Always order by complete part number: Part Number Package UCN5816A 28-Pin DIP UCN5816EP 28-Lead PLCC ABSOLUTE MAXIMUM RATINGS at TA = 25°C Input Voltage Range, Package Power Dissipation, Operating Temperature Range, Storage Temperature Range, Caution: CMOS devices have input static protection but are susceptible to damage when exposed to extremely high static electrical charges. Data Sheet 26186.10

4-TO-16 LINE LATCHED DECODER/DRIVERS

115 Northeast Cutoff, Box 15036

Worcester, Massachusetts 01615-0036 (508) 853-5000 14 15 Dwg. PP-031 GROUND CHIP ENABLE STROBE V OUTPUT ENABLE DIODE COMMON 0-7 D C B 8-15 GROUND IN IN IN IN OUT OUT OUT OUT OUT OUT OUT OUT DIODE COMMON A OUT 0 OUT 1 OUT 3 OUT 2 OUT 4 OUT 5 OUT 6 OUT 7 DDLOGIC SUPPLY LATCHES DECODER CE ST OE K K 50 75 100 125 150 2.5 0.5 ALLOWABLE PACKAGE POWER DISSIPATION IN WATTS AMBIENT TEMPERATURE IN °C 2.0 1.5 1.0 3.0 Dwg. GP-028-1A SUFFIX 'A', R = 45 °C/W qJA SUFFIX 'EP', R = 55 °C/W qJA UCN5816A Dwg. EP-021-4 OUT K TYPICAL INPUT CIRCUITS TYPICAL OUTPUT DRIVER Dwg. EP-010-3 IN V DD Dwg. EP-010-4A IN VDD W Copyright © 1984, 1995, Allegro MicroSystems, Inc.

4-TO-16 LINE LATCHED DECODER/DRIVERS ELECTRICAL CHARACTERISTICS at TA = 25°C, VDD = 5 V (unless otherwise specified). Leakage Current Limits Characteristic Symbol Test Conditions Min. Typ. Max. Units Output Leakage Current I CEX VCE = 60 V, TA = +25°C— — 5 0 µA Output Saturation Voltage V CE(SAT) IC = 100 mA — 0.9 1.1 V IC = 200 mA — 1.1 1.3 V IC = 350 mA, VDD = 7.0 V — 1.3 1.6 V Input Voltage V IN(0) -0.3 — 0.8 V VIN(1) VDD = 12 V 10.5 — — V VDD = 5.0 V 3.5 — 5.3 V Input Resistance R IN VDD = 12 V 50 200 — k Ω VDD = 5.0 V 100 600 — k Ω Supply Current I DD(ON) VDD = 12 V, Outputs Open — 2.0 3.0 mA VDD = 5.0 V, Outputs Open — 1.0 1.5 mA IDD(OFF) All Drivers OFF, All Inputs = 0 V, — — 100 µA OE = VDD = 5.0 V All Drivers OFF, All Inputs = 0 V, — — 200 µA OE = VDD = 12 V Clamp Diode I R VR = 60 V, TA = +25°C— — 5 0 µA VR = 60 V, TA = +70°C — — 100 µA Clamp Diode V F IF = 350 mA — 1.5 2.0 V Forward Voltage

4-TO-16 LINE LATCHED DECODER/DRIVERS Worcester, Massachusetts 01615-0036 (508) 853-5000 Information present at the inputs is transferred to the latches when the STROBE is high. The latches will continue to accept new data as long as the STROBE is held high. With the STROBE in the low state, no information can be loaded into the latches. Depending on the four address inputs, the 4-to-16 line decoder enables one of the 16 output sink drivers. When the OUTPUT ENABLE is high, all of the outputs are disabled (OFF) without affecting the informa- tion stored in the latches. When the OUT- PUT ENABLE is low, the outputs are con- trolled by the information in the latches. When the CHIP ENABLE is low, all of the outputs are disabled (OFF). With two de- coder/drivers and an inverter, the CHIP ENABLE function can be used for 5-to-32 line decoding applications. Q O = The output condition prior to the high-to-low transition of the STROBE input. X = Irrelevant CLEAR STROBE OUTPUT ENABLE INN OUT N A C BC B G D E F A C B G E p/o Dwg. No. A-10,895A TIMING CONDITIONS (Logic Levels are VDD and Ground) A. Minimum Data Active Time Before Strobe Enabled B. Minimum Data Active Time After Strobe Disabled D. Typical Time Between Strobe Activation and Output On to E. Typical Time Between Strobe Activation and Output Off to TRUTH TABLE CHIP IN D INC INB INA OUTPUT OUTPUTS STROBE ENABLE (MSB) (LSB) ENABLE (OFF unless otherwise specified) 110 0 0 0 0 O U T 0ON 110 0 0 1 0 O U T 1 ON 110 0 1 0 0 O U T 2 ON 110 0 1 1 0 O U T 3 ON 110 1 0 0 0 O U T 4 ON 110 1 0 1 0 O U T 5 ON 110 1 1 0 0 O U T 6 ON 110 1 1 1 0 O U T 7 ON 111 0 0 0 0 O U T 8 ON 111 0 0 1 0 O U T 9 ON 111 0 1 0 0 O U T 10 ON 111 0 1 1 0 O U T 11 ON 111 1 0 0 0 O U T 12 ON 111 1 0 1 0 O U T 13 ON 111 1 1 0 0 O U T 14 ON 111 1 1 1 0 O U T 15 ON 0 1 X XXX 0 Q O X 0 X X X X X All OFF X X X X X X 1 All OFF