5616

5616 ALLEGRO

Document overview

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Technical content

2-FUNCTION, 4-DIGIT LCD AUTOMOTIVE CLOCK DATA BACKPLANE PM AM adge1 COLON ad3 SELECT GROUND IGNITION NU NU GROUND OSC. { 2040 x 3040 mm 0.080 x 0.120 in VDD VPP DISCONTINUED PRODUCT — FOR REFERENCE ONLY 2-FUNCTION, 4-DIGIT LCD AUTOMOTIVE CLOCK—PROGRAMMABLE The SCL5616HW is a 2-function digital automotive clock circuit. Fabricated on a single monolithic chip using silicon-gate CMOS PROM technology, it offers low cost, low power, and high reliability. It also includes digital frequency correction, stored in the internal nonvolatile memory, for easy adjustment of the oscillator nominal frequency. The SCL5616HW is supplied in wafer form and is rated for continuous operation over the automotive temperature range of -40°C to +85°C.

FEATURES

n Digital Tuning of Crystal Frequency n PROM for Storing Frequency Correction Information n 12 or 24 Hour Timekeeping Option n Flashing Colon n Two Switches Control All Setting Functions n High Noise Immunity n Internal Power-Up Reset Circuitry n Internal Voltage Regulation Dwg. No. PC-001 Always order by complete part number:SCL5616HW. Caution: These CMOS devices have static pro- tection, but are susceptible to damage if exposed to extremely high static electrical charges. ABSOLUTE MAXIMUM RATINGS Input Voltage Range, VIN (Programming Operating Temperature Range, Storage Temperature Range, 5616 Data Sheet 26110

2-FUNCTION, 4-DIGIT LCD AUTOMOTIVE CLOCK

115 Northeast Cutoff, Box 15036

Worcester, Massachusetts 01615-0036 (508) 853-5000 A M P M Dwg. EC-001

4.194304 MHz

C = 15 pF, R = 50 W6.8 kW 1 MW MINUTES HOURS IGNITION BACKPLANE SEGMENTS 47 mF VDD +12 V SL GROUNDS TYPICAL APPLICATION W Copyright © 1990, 1995, Allegro MicroSystems, Inc.

2-FUNCTION, 4-DIGIT LCD AUTOMOTIVE CLOCK Limits Characteristic Symbol Test Conditions Min. Typ. Max. Units Operating Voltage Range V DD TA = +25°C 4.5 — — V Zener Voltage V DD IDD = 1.0 mA 5.5 — 6.8 V Segment Output Current I OUT VDD = 5.0 V, VOUT = 4.8 V -20 — — µA VDD = 5.0 V, VOUT = 0.2 V 120 — — µA Backplane Output Current I OUT VDD = 5.0 V, VOUT = 4.8 V -80 — — µA VDD = 5.0 V, VOUT = 0.2 V 240 — — µA LCD Drive Signal V DISP VDD ≥5.0 V 4.0 — — V Input Current I IN S1, S2, DATA, or SELECT -55 — -700 µA Oscillator Frequency f OSC — 4.194 304 — MHz Oscillator Starting Time t OSC VDD = Zener voltage — — 200 ms Oscillator Stability Δ fOSC Δ VDD = ±100 mV — — ±1.0 ppM Backplane Frequency f BP —6 4— H z Switch Debounce Time t DB 0 — 62.5 ms Osc. Feedback Resistance R OSC —1 6— M Ω Osc. Input Capacitance C OSCI —1 5— p F Osc. Output Capacitance C OSCO —3 0— p F Supply Current I DD VDD = 5.0 V — — 1.0 mA NOTE: Negative current is defined as coming out of (sourcing) the specified device terminal. ELECTRICAL CHARACTERISTICS at TA = -40°C to +85°C, in Typical Application (unless otherwise noted). DISPLAY FORMAT AM PM a1 a2 a3 a4 d1 d2 d3 d4 g1 g2 g3 g4 b2 b4b1 b3 c1 c3 c2 c4e1 e3 e2 e4 f2 f4 f3 COLON Dwg. No. OC-001

2-FUNCTION, 4-DIGIT LCD AUTOMOTIVE CLOCK Worcester, Massachusetts 01615-0036 (508) 853-5000 FUNCTIONAL DESCRIPTION DATA Logic Levels are VDD and Ground Power-Up Reset. When power up occurs, the hours and minutes counters are reset, and the clock starts running: Operation 12-Hour mode and counting starts from 1:00 AM Programming Modes. Data is loaded by pulling DATA low (1 µs pulse duration) n times to set the desired bits for frequency correction into the data input register. This information is latched in the RAM, thus allowing the testing of the oscillator frequency adjustment without storing the selected pattern in the PROM cells. The data latched in the RAM is stored in the PROM cells when DATA is held low for a mini- mum of 10 ms. The data stored in the data input register is cleared on any SELECT transition (low to high or high to low). It is also cleared when the program power voltage (V PP ) is reduced from 18 V to VDD . Clearing the data input register does not affect the data latched in the RAM. Program DATA SELECT VPP VD VS Operation

18 V Pulse Ground DATA load for frequency correction

18 V Ground V DD DATA store

VDD VDD Ground Verify stored data FREQUENCY CORRECTION Dwg. No. WC-001-1 VERIFY CYCLE (V = V ) tDHPL tPLSX tSVDL tDLH twD VPP VD VS tPHDL tSHDXtSLDV VS PP DD SEGMENT OUTPUTS tDHL 123 FREQUENCY CORRECTION

127 MAX

2-FUNCTION, 4-DIGIT LCD AUTOMOTIVE CLOCK S1 S2 IGNITION Operation Open Open X Clock running X X Ground Setting disabled Ground Open 12 V Set hours Open Ground 12 V Set Minutes Ground Ground 12 V Change counting sequence (12 to 24 hour or 24 to 12 hour) Frequency Correction. The on-chip oscillator circuit increases the crystal frequency approximately 40 ppm. This ensures that the typical crystal will operate within the tuning range. With V S at ground, data pulses are then used to trim the internal clock frequency by 2 to 254 ppm to the required value. The quantity of data pulses needed (1 to 127) is n = f BP - 64 128 x 10-6 where fBP is the measured frequency at BACKPLANE. Prior to trim- ming, it must be between 64.000 128 Hz and 64.016 256 Hz. X = Irrelevant, ground or 12 V Clock Running Mode. During the clock running mode, setting functions are achieved by either momentary or continuous operation of switches S1 and S2, which are enabled by IGNITION. Hours or minutes are incremented on S1 or S2 (respectively) depression and continue at a 1 Hz rate while the switch is depressed. X = Irrelevant, ground or 12 V for IGNITION, ground or open for S1 and S2 Diagnostic Mode. To enter the diagnostic mode, S1 and S2 are oper- ated with IGNITION connected to 12 V. All segments are displayed for as long as S1 and S2 are depressed. On opening S1 and S2, the clock will leave the diagnostic mode and go through a power-up sequence. In the SCL5616HW, the counting sequence will change (from 12 hour to 24 hour or from 24 hour to 12 hour). To inhibit the power-up reset, hold the DATA input low (ground). The counting mode will change without resetting the hours or minutes counters. Program SELECT VPP VS S1 S2 IGNITION Mode VDD VDD Open Open X Clock running VDD VDD Ground Ground 12 V Diagnostic

18 V Ground Open Open X Programming

Operating Modes. The operating modes of the clock are controlled by the voltages applied to VPP , SELECT, IGNITION, and switches S1 and S2.

2-FUNCTION, 4-DIGIT LCD AUTOMOTIVE CLOCK Worcester, Massachusetts 01615-0036 (508) 853-5000 Frequency Selection Pulses 64 32 16 8421 Segment b4 c4 d4 e4 c3 e3 c2 Characteristic Symbol Min. Max. Units PROGRAM High (18 V) to DATA Low t PHDL 1.0 — µs SELECT Valid to DATA Low t SVDL 25 — µs DATA Low to DATA High t DLH 1.0 1.5 µs DATA High to DATA Low tDHL 1.0 — µs DATA Store Pulse Duration t wD 10 — ms DATA High to PROGRAM Low t DHPL 1.0 — µs PROGRAM Low to SELECT Change t PLSX 1.0 — µs SELECT Low (Verify) to DATA Valid t SLDV — 1.0 µs DATA Hold from End of Verify t SHDX —1 0 n s RECOMMENDED FLASH PROGRAMMING CHARACTERISTICS at TA = +25°C, Logic Levels are VDD and Ground (except PROGRAM High) Stored Data Verification. In the verify mode, the complement value of the information stored in the PROM cells is brought out directly to the segment output terminals for easy verification of the stored data. If a bit is programmed (high), the appropriate segment output is turned ON (low). The segments represent the binary equivalent of the number of frequency correction data pulses entered. Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improve- ments in the design of its products. The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for its use; nor for any infringements of patents or other rights of third parties which may result from its use.