41T

41T NELLSEMI

Document overview

• Manufacturer or author: Provided By www.digicamel.com(FREE DATASHEET DOWNLOAD SITE)
• PDF pages: 5

Technical content

www.nellsemi.com Page 1 of 5 SEMICONDUCTOR 41T Series RoHS RoHS TRIACs, 40A

FEATURES

APPLICATIONS

Low thermal resistance with clip bonding Low thermal resistance insulation ceramic for insulated TO-3P package High commutation capability 41T series are UL certified (File ref: E320098) MAIN FEATURES SYMBOL VALUE UNIT IT(RMS) V /VDRM RRM IGT(Q1) 40 A V mA35 to 50 600 to 1600 A1 A2 G TO-3P (Insulated) (41TxxBI) A1 A2 G TO-3P (non-Insulated) (41TxxB) Snubberless Packages are RoHS compliant Due to their clip assembly techinque, they provide a superior performance in surge current handling capabilities. By using an internal ceramic pad, the 41T series provides voltage insulated tab (rated at 2500VRMS) complying with UL standards. SYMBOL IT(RMS)RMS on-state current (full sine wave) TO-3P ITSM Non repetitive surge peak on-state current (full cycle, T initial = 25°C)j A I t22I t Value for fusing 800 2A s dI/dt Critical rate of rise of on-state current I = 2xl , t ≤100nsG GT r IGMPeak gate current 4 PG(AV)Average gate power dissipation 1 PGM 10 W A/µs A A UNITVALUE 400 420 F =50 Hz F =60 Hz t = 20 ms t = 16.7 ms t = 10 msp F =100 Hz T =125ºCj T =125ºCj T =125ºCj T =20 µsp ABSOLUTE MAXIMUM RATINGS PARAMETER TEST CONDITIONS TO-3P insulated T = 95ºCc T = 80ºCc TstgStorage temperature range Operating junction temperature range - 40 to + 150 - 40 to + 125 ºC Tj Peak gate power dissipation (tp = 20µs) T =125ºCj The snubberless concept offer suppression of RC network and it is suitable for applications such as on/off function in static relays, heating regulation, induction motor starting circuits, phase control operation in light dimmers, motor speed controllers, and silmilar. 2(A2) 3(G) 1(A1)

www.nellsemi.com Page 2 of 5 SEMICONDUCTOR RoHS RoHS 41T Series V (2)TM MAX. Vt0(2) Threshold voltage MAX. Dynamic resistance MAX. IDRM IRRM MAX. mA Note 1: Minimum l is guaranted at 5% of l max.GT GT Note 2: For both polarities of A2 referenced to A1. I = 60 A, TM t = 380 µsP T = 125°Cj T = 25°Cj T = 125°Cj T = 125°Cj T = 25°Cj 1.55 0.85 V V µA mΩ STATIC CHARACTERISTICS UNITVALUETEST CONDITIONS SYMBOL (2)Rd V = VD DRM V = VR RRM 41Txxxx Unit I (1)GT I - II - III VGT I - II - III VGD I - II - III (2)IH MAX. I - III MAX. mA II (2)dV/dt MIN. (dI/dt)c (2) A/ms IL MAX. MIN. V = 12 V, R = 30ΩD L V = V , R = 3.3KΩD DRM L T = 125°Cj I = 500 mAT I = 1.2 IG GT V = 67% V gate open ,T = 125°CD DRM j, Without snubber, T = 125°Cj 1.3 0.2 100 1000 mA V V mA V/µs TEST CONDITIONS QUADRANTSYMBOL BW SNUBBERLESS and Logic level (3 quadrants) (T ºC unless otherwise specified)J= 25 ELECTRICAL CHARACTERISTICS THERMAL RESISTANCE Rth(j-c) Junction to case (AC) Rth(j-a) Junction to ambient 0.9 °C/W UNITVALUESYMBOL TO-3P TO-3P Insulated 0.6 TO-3P, TO-3P Insulated 50 S = Copper surface under tab.

ORDERING INFORMATION

ORDERING TYPE MARKING PACKAGE WEIGHT ,BASE Q TY DELIVERY MODE TO-3P 4.3g 30 Tube PRODUCT SELECTOR PART NUMBER VOLTAGE (xx) SENSITIVITY PACKAGE 800 V 50 mA 1600 V 41TxxB-BW/ 41TxxBl-BW TYPE V V 1000 V V Snubberless BI: Insulated TO-3P package TO-3P 1200 V V 41TxxBI-yy 41TxxBI-yy 4.8g 30 Tube Note: xx = voltage, yy = sensitivity TO-3P insulated 600 V V

www.nellsemi.com Page 3 of 5 ORDERING INFORMATION SCHEME Triac series Current Voltage 41 = 40A 06 = 600V 08 = 800V BW = 50mA Snubberless Package type 10 = 1000V I Sensitivity GT B = TO-3P (non-insulated) BI = TO-3P ( )insulated

41 T 06 B - BW

Fig.1 Maximum power dissipation versus on-state rms current (full cycle) Fig.2 On-state rms current versus case temperature (full cycle) P (W) I (A)T(RMS) 125100755025 Fig.3 Relative variation of thermal impedance versus pulse duration. Fig.4 On-state characteristics (maximum values). 1E-03 1E-02 1E-01 1E+00 K=[Z /R ]th th 1E+0.31E+021E+011E+001E-011E-02 0 5 10 15 20 25 1E-03 I (A)T(RMS) 30 35 40 180° α α α=180° TO-3P TO-3P(insulated) T (°C)C Zth(j-c) TO-3P TO-3P(insulated) tp(s) T max.j V = 0.85 Vto R = 10 mΩd T =T maxj j T =25°Cj V (V)TM 100 400 I (A)TM 12 = 1200V 16 = 1600V

www.nellsemi.com Page 4 of 5 41T Series 0.01 2 2I (A),l t(A s)TSM 1.000.10 Fig.7 Relative variation of gate trigger, holding and latching current versus junction temperature. Fig.9 Relative variation of critical rate of decrease of main current versus (dV/dt)c. 100 150 200 250 1 10 100 1000 300 100 1000 10000 Fig.5 Surge peak on-state current versus number of cycles. 350 400 450 t=20ms One cycle Non repetitive T initial=25°Cj Repetitive T =70°Cc Number of cycles Fig.6 Non-repetitive surge peak on-state current for a sinusoidal pulse and corresponding 2 value of l t. t (ms)p 2I t ITSM dl/dt limitation 50A/µs T initial =25°Cj Pulse width tp <10 ms 10.00 l ,l ,l [T ] / l ,l ,l [T =25°C]GT H L j GT H L j 0.0 0.5 1.0 1.5 2.0 2.5 -40 -20 0 20 40 60 80 100 120 140 T (°C)j Fig.8 Relative variation of critical rate of decrease of main current versus (dV/dt)c (typical values). 0.4 0.8 1.2 1.6 2.0 (dI/dt)c [(dV/dt)c] / specified (dI/dt)c 0.1 1.0 10.0 100.0 1.8 1.4 1.0 0.6 (dV/dt)c (V/µs) (dI/dt)c [T ] / j (dI/dt)c [T specified]j 0 25 50 75 100 125 T (°C)j I (A)TSM l & lH L lGT Typical values

www.nellsemi.com Page 5 of 5 SEMICONDUCTOR RoHS RoHS Case Style 41T Series TO-3P 2.90 (0.114) 2.70 (0.106) 0.70 (0.028) 0.50 (0.020) 1.55 (0.061) 1.45 (0.057) 4.60 (0.181) 4.40 (0.173) 5.65 (0.222) 5.40 (0.213) 5.65 (0.222) 5.40 (0.213) 15.60 (0.614) 14.35 (0.565) 16.50 (0.650) 15.80 (0.622) 21.10 (0.831) 20.40 (0.803) Φ4.17 (0.164) 4.08 (0.160) 15.50 (0.610) 15.10 (0.594) R 4.60 (0.181) 3.65 (0.144) 3.40 (0.134) 1.40 (0.055) 1.20 (0.047) 1 2 3 2(A2) 3(G) 1(A1)