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3875081 G E SOLID STATE O1E 15019 » 32S
. Small-Signal MOSFETs nS 3N204, 3N205, 3N206 Silicon Dual Insulated-Gate . Field-Effect Transistors With Integrated Gate-Protection Circuits for VHF TV
Applications
3N204 — RF Amplifier 3N205 — Mixer . 3N206 — TV IF Amplifier Features: ° ts Low Cras — 0.03 pF max. High |Yie| — 14 mmho typ. for 3N204 and 3N205 m Integrated gate-protection diodes The RCA-3N204, 3N205, and 3N206 are n-channel silicon, capacitance allows high-gain stable operation without depletion type, ‘dual-insulated gate, field-effect transistors ine neutralization. The 3N205 is specified for low noise vhf mixer tended for vhf TV applications. Integrated back-to-back diodes applications. The 3N206 is intended for use in tuned high- protect the gates from excessive input voltages. frequency amplifiers such as TV if strips. The 3N204 is intended for use in vhf rf amplifiers and delivers linear, low-noise amplification. Its ‘extremely low feedback Maximum Ratings, Absolute-Maximum Values at Ta = 25°: . | * GATE No.2-TERMINAL REVERSE CURRENT. epee erererererrrerrerrrrtrrrrtir et Laahaaas —10 mA * DEVICE DISSIPATION: i * AMBIENT TEMPERATURE RANGE: SlOrage... eevee sece eee eecn esse ers eesenseeseeseeensees esse eee eee ee ee eee veceeeteeeeeeceerseesss+ 65 to +200°C * LEAD TEMPERATURE (During Soldering): 4 Forward gate-terminal current is the current into a gate terminal with a forward-gate-to-source voltage applied. t ‘This voltage is of such polarity that an increase In Its magnitude causes the channel resistance to decrease. | * In accordance with JEDEC registration data format (JS-9 ROF-19B). 4074 3277 c=-10 }
—— —_ , - G E SOLID STATE OL DE 3875081 Oo1soe0 O D Ts “ZS . eS smat- Signal MOSFETS : 3N204, 3N205, 3N206 ELECTRICAL CHARACTERISTICS, At T, = 26°C (untess otherwise specified) ‘ CHARACTERISTIC TEST CONDITIONS UNITS *| Drain-to-Source Breakdown Ip = 10uA, Voltage, ViBR)DS Ve1s"VG2s= -8V v *] Gate No.1-to-Source Forward Breakdown Voltage, ViBR)GISSF! Iq1=10mA, Vaas-Vos"0 Lf] | c *] Gate No.1-to-Source Reverse Breakdown Voltage, Vigayarssr’| 6” “toma Vg2s" Vos? Eom *] Gate No.2-to-Source Forward Breakdown Voltage, V(pR)G2SSF1 Igg=10mA, Veis*Vos"0 v | Gate No.2-to-Source Reverse %| Gate No.1-Terminal Forward . ° Current, IgissF Veis-8V. Veas-Vps"0 sleuenowteninanewe Tveeesv, tame | — [10 | oa] *| Gate No.2-Terminal Forward Current, IgassF Ve2s"5V. Vais-Vos"0 *| Zero-Gate No.1-Voltage Vps"15V. Veis-0f 2204 [6 [30 | : Drain Current, Ips? Vgos-4V [sn205 |" 6 [30 | mA [vanzog | 3 | 16 | =15V,, *| Gate No. 1-to-Source Cutoff ves ay Vv Voltage. VG1S(off) Ip=20uA +] Gate No.2-to-Source Cutoff Vos*18v. Voltage, V, Vois*0. 02) 4 v . VG2sioff) Ip=20uA *| small-Signal Common-Source Vps=15V. [anz0a_| 10 | 22 | Forward Transfer Admittance, Ve1s"0, [av205 | 10 | 22 | vest? Vo2s"4V. 7 ba f=1 kHz . +] Small-Signal Common-Source Vine 18V., ~ Reverse Transfer Capacitance, ps15V, Vgas"4V. Ip = 10 mA, f= 1 MHz . Ciss { in accordance with JEDEC registration data format (JS-9 ROF-198), 1. Al gate breakdown voltages are measured while the device fs conducting rated gate current, ‘This ensures that the gate-voltage-timiting network is functioning properly. 2. This characteristic must be measured using pulse techniques (tw = 300us, duty cycle < 2%). { 3. This characteristic must be measured with bias voltages applied for fess than § seconds to H seid overheating, The signal 1s applied to gate No.t with gate No.2 at ac ground. - H 1075
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G E SOLID STATE 01 De 3875081 oo1soe. 2 0 723-25 ‘Small-Signal MOSFETs T : 3N204, 3N205, 3N206 OPERATING CHARACTERISTICS at Tp = 25°C . CHARACTERISTIC TEST CONDITIONS UNITS [a [ve | . +] Common-Source Spot Noise Figure, NF +[SmaltSignal Common-Source| Vpp=18 V. Vac=7 V, Insertion Power Gain, Gp: f= 200 MHz, See Fig.13 ° *[Bandwidth, BW [7 [= [2 [ne | */Gain-Control GateSupply | VoD=18 V, AGps=—304B,1 Voltage, VGG(GC) £200 MHz, See Fig. 13 v +[Common Source Spot Noise | + {Small Signal Common Source| & “somes ID eo mA, Insertion Power Gain, Gps ae Figs. 10 oe *[Small-Signal Conversion a ~ 3 Power Gain, Gps (conv) Vop=18V, fLo=245MH25) 47 28 «tianawian, BW fF=200 MHz, See Fig? [PP 7 | we | *|Common-Source Spot Noise . Figure, NF + Smalt-Signal Common-Source| Vpp=24 V, VaG-6 V. Insertion Power Gain, Gps _| f=45 MHz, See Fig. 14 «[ Bandwidth, BW [3 |= [6 [me | *| Gain-Control Gate-Supply Vpp=24 V, AGps=—30dB,2 Voltage, VGG(GC) 245 MHz, See Fig. 14 v in accordance with JEDEC registration data format (JS-9 RDF-19B). 1, AGpg i defined a the change in Gp from the value at Vg * 7V- 2. AGpe is defined asthe change n Gp, trom the value at Vgg * 6 3. Amplitude at input from local oscillator is 3 V RMS. t TYPICAL CHARACTERISTICS A ee oe Ae 5 i ; eee onan-70-20nce WATS os) Core mits OrstMe) Fg. 1 — Drain curren vs. drain-to-source volts Fig.2 ~ Drain current vs gate-No.1-tosource volte (bulsetested with pulse duration = (pulsetested with pulse duration = 300 us, 300 us, duty cycla <2%). duty cycle < 2%). 4076 “3279 t-12 |
“J¢ E SOLID STATE OL De 3875081 oo1soee 4 0-31-25 . See ‘Smaii-Signal MOSFETs . 3N204, 3N205, 3N206 TYPICAL Y-PARAMETER CHARACTERISTICS ‘ . Ranier euPERTORE Tayeasre =—s va] aupiewr TeupenaTune areze FEEL 2 {ee ceennts fo RR || : iment tet ee a Fig.3 — Vig vst Fig.4 — Vig v8. VG2S — "| SRARNSEESUMEOTGE tvoeynes EET Fig.5 ~ Vfq vs. # Fig.6 — ¥fg vs. Vo2s 3) Skte nee vo-sounce vouts gzs i+ Pry PARRU CLAM Z YOUN (vpsieis HERE . fey, saison ees TI |g erento wlio EH ° erequencr t-Mte em GATE No.2-TO- SOURCE VOLTS (Vezs! gecserse ‘Ritenr seurenatun anata ‘Guarent TOMPERATURE (vale: TTR] ia are nol To-sounce volte ga!-0 TTL ate neinTo-source voure Waisl-o HEH emer vane) tear enc WAC coe Fly. = Css v2. Vers Fig.10 ~ Coss vs. Vo2s 5 1077 | 3280 G13:-
G E SOLID STATE O1 de fse7so82 oo1soe3 & ° T-3EZ5 : - Small-Signal MOSFETs _— * . 3N204, 3N205, 3N206 TYPICAL OPERATING CHARACTERISTICS! FOR 3N204 ‘ SRRSELUPE ooo ETE iG “OUR Eee aH Erg ae TERE Mar taaeneattireessaeessesinrssazsctuestrccnrccziat| e
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tuo coenos eae PAL autho a TEST CIRCUITS . Yas Yoo ta °. ne anal | 7 | | | voxa: « 22 \\ ] d woe gl iE | i seoxa ip i-ons* pou 9 0 090 | mee o r Le ! | Be BB te | the | | Lepr 3 | L_L1__ ---l-- Lis . Fig.13 ~ 200i power goin, gan-controlvoltag, and noie-gure test circuit for 204. + tn accordance with JEDEC registration data formot US-9 ROF-198).. OB “3281 C-14 > .
5081 oo1soe4 8 ‘Te3)- G E SOLID STATE OL DE 3875083 | oT+31-28 . ee Smalil-Signal MOSFETs : . 3N204, 3N205, 3N206 oo Yoo 8 & _ eC Le _\\|% r an | rae Tey | oct | Ke ae | I \\. . emir se BY)! meg Pe 1) | | ‘ 1 § | | ee coe <a | wre: tT Fi.16 —-46-Mle power sin end noe tet cul for 208° * In scoordance with JEDEC registration data format (JS-9 ROF-198). oes 7 | 1 i rrousoa | a ae . wooneey ee 3n204 i i | waren foe | LL! { f ! 1 1 | i | I i ! . I \\ ‘ 4 i
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\\ L 1 Haren} -7-2 ren Jt088 { T ne Lea as ar ee. tans hn psoas) wore: Friese, PET mt OIE 1 . SpuaeotneeS i Stove aan oe ceron See ee oe Sete ior rexp-rruan cancion. cout SEER nase an Fig. 15 — ~450-MHz power-gain and noise-figure test circuit for 3N204*. * In accordance with JEDEC registration data format (JS-9 ROF-19B). ee SSS “3282 o-o1 }
G E SOLID STATE OL DE 3875081 ooLsoes a ° T=3r25 - ‘Small-Signal MOSFETs — = ne na . 3N204, 3N205, 3N206 . Pere aan Gear 1 | 28) Se oe an - = nr comeron ve-2307. 9 cOMNETEnve-E9OY ° °: Nw Ser 4 }--+ sip--Galapss - A aS ‘ \\_ VW) _t soo ie T soo 1 ous er tt, 3 — — Feroonee aye . oy i —+ i & | \\ [pase seo. —tpcal views - ceo i | - 8% ee | cad res a el Liza s TC ea | 4 {BEFORE BENDING) (a tae wots . NOTES: ‘A. Dimensions in parentheses are in millimeters and are derived from the basic inch dimensions, as indicated. B. The removable top of test fixture is not shown. C. For clarity, the 62 kS2 resistor, the source and gate-2 socket pins, and insulating stand-off terminals {ISOT) soldered into the fold of L1 and L2 respectively for mechanical support, are not shown in 7 view A. H D. C1 and C2 {C3 and C4) consist of shim brass and the “C” portion of . L1 (L2) separated by air and the mylar tape covering the “C” portion of L1 (L2). . . E. The four views surrounding the center view are as they would appeer before the metal is bent up to form the sides. Fig.16 — —450 MHz powergain and ‘noise-figure test fixture*. . ® Imaccordance with JEDEC registration data format (J8-9 RDF-198). | $00 : 3283 B-G2 ) :
- Jc & SOLID STATE OL DE 93675081 0015026 1 sees Small-Signal MOSFETs : So 3N204, 3N205, 3N206 3875081 G E SOLID STATE. . O1E 15026 BD 31-25 Yoo ~ Hoa fon sie ie @ ecg 268 sea ReoF . Py YY Ao g fe ‘ haw ores 2700 OR foe excu-e796s NOTE: ‘Ti: PRI: 16 TURINS No.30 WIRE CLOSE WOUND Gf ahco 402, 600 pF, « EQUIVALENT Onin nt ia. ron Tyre "0" SLUG Cz: ARCO ae, 12-16GF, OA EQUIVALENT tc: TURN No 90 WINE CENTERED h:4 TURN Ne.14WNe, 1/4 NOH INSIOEDIA. ‘Oven PRaMARY Fig.17 — -200 MHsz-to-45-MHz cirevit for conversion power gein for SN205*. © In accordance with JEDEC registration data format (JS-9 ROF-198). TERMINAL DIAGRAM OPERATING CONSIDERATIONS Bottom View The flexible leads of these devices are usually . . soldered to the circuit elements. As is the Qa tere with any high-frequency semiconductor TA Lead 1—DRAIN device, the tips of soldering irons MUST be f Al LEAD 2— GATE No.2 grounded, ( LEAD 3 —GATE No.1 LEAD 4 — SOURCE, Lo SUBSTRATE AND CASE © © 108 @ 3204 0-02 ~