3967

A3967SLB ALLEGRO

Document overview

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Technical content

at TA = +25°C Output Current, IOUT Logic Input Voltage Range, V IN Package Power Dissipation, Operating Temperature Range, Storage Temperature Range, * Output current rating may be limited by duty cycle, ambient temperature, and heat sinking. Under any set of conditions, do not exceed the specified current rating or a junction temperature of 150°C. Data Sheet26184.24C 3967 The A3967SLB is a complete microstepping motor driver with built-in translator. It is designed to operate bipolar stepper motors in full-, half-, quarter-, and eighth-step modes, with output drive capabil- ity of 30 V and ±750 mA. The A3967SLB includes a fixed off-time current regulator that has the ability to operate in slow, fast, or mixed current-decay modes. This current-decay control scheme results in reduced audible motor noise, increased step accuracy, and reduced power dissipation. The translator is the key to the easy implementation of the A3967SLB. By simply inputting one pulse on the STEP input the motor will take one step (full, half, quarter, or eighth depending on two logic inputs). There are no phase-sequence tables, high-frequency control lines, or complex interfaces to program. The A3967SLB interface is an ideal fit for applications where a complex µP is unavail- able or over-burdened. Internal circuit protection includes thermal shutdown with hyster- esis, under-voltage lockout (UVLO) and crossover-current protection. Special power-up sequencing is not required. The A3967SLB is supplied in a 24-lead SOIC with copper batwing tabs. The tabs are at ground potential and need no insulation. A lead- free (100% matte tin leadframe) version is also available.

FEATURES

I ±750 mA, 30 V Output Rating I Satlington™ Sink Drivers I Automatic Current-Decay Mode Detection/Selection I 3.0 V to 5.5 V Logic Supply Voltage Range I Mixed, Fast, and Slow Current-Decay Modes I Internal UVLO and Thermal Shutdown Circuitry I Crossover-Current Protection LOAD SUPPLY1 SLEEP ENABLE OUT1A GND STEP OUT1B RESET LOAD SUPPLY2 SENSE1 DIR OUT2A PFD RC1 REF ÷8 RC2 LOGIC SUPPLY OUT2B MS2MS1 SENSE2 PWM TIMER TRANSLATOR & CONTROL LOGIC VBB2 VBB1 VCC Dwg. PP-075-2 178 GND GND GND Always order by complete part number: Part Number Package A3967SLB 24-lead batwing SOIC A3967SLB-T 24-lead batwing SOIC; Lead-free

115 Northeast Cutoff, Box 15036

Copyright © 2002, 2003 Allegro MicroSystems, Inc. Table 1. Microstep Resolution Truth Table

www.allegromicro.com 3 ELECTRICAL CHARACTERISTICS at TA = +25°C, VBB = 30 V, VCC = 3.0 V to 5.5V (unless otherwise noted) Limits Characteristic Symbol Test Conditions Min. Typ. Max. Units Output Drivers Load Supply Voltage Range V BB Operating 4.75 – 30 V During sleep mode 0 – 30 V Output Leakage Current I CEX VOUT = VBB – <1.0 20 µA VOUT = 0 V – <-1.0 -20 µA Output Saturation Voltage V CE(sat) Source driver, IOUT = -750 mA – 1.9 2.1 V Source driver, IOUT = -400 mA – 1.7 2.0 V Sink driver, IOUT = 750 mA – 0.65 1.3 V Sink driver, IOUT = 400 mA – 0.21 0.5 V Clamp Diode Forward Voltage V F IF = 750 mA – 1.4 1.6 V IF = 400 mA – 1.1 1.4 V Motor Supply Current I BB Outputs enabled – – 5.0 mA RESET high – – 200 µA Sleep mode – – 20 µA Control Logic Logic Supply Voltage Range V CC Operating 3.0 5.0 5.5 V Logic Input Voltage V IN(1) 0.7VCC ––V VIN(0) – – 0.3V CC V Logic Input Current I IN(1) VIN = 0.7VCC -20 <1.0 20 µA IIN(0) VIN = 0.3VCC -20 <1.0 20 µA Maximum STEP Frequency f STEP 500* – – kHz Blank Time t BLANK Rt = 56 kΩ , Ct = 680 pF 700 950 1200 ns Fixed Off Time t off Rt = 56 kΩ , Ct = 680 pF 30 38 46 µs continued next page …

Worcester, Massachusetts 01615-0036 (508) 853-50004 ELECTRICAL CHARACTERISTICS at TA = +25°C, VBB = 30 V, VCC = 3.0 V to 5.5V (unless otherwise noted) Characteristic Symbol Test Conditions Limits Min. Typ. Max. Units Control Logic (cont’d) Mixed Decay Trip Point PFDH – 0.6V CC –V PFDL – 0.21V CC –V Ref. Input Voltage Range V REF Operating 1.0 – V CC V Reference Input Impedance Z REF 120 160 200 k Ω Gain (Gm) Error (note 3) EG VREF = 2 V, Phase Current = 38.37% † – – ±10 % VREF = 2 V, Phase Current = 70.71% † – – ±5.0 % VREF = 2 V, Phase Current = 100.00% † – – ±5.0 % Thermal Shutdown Temp. T J – 165 – °C Thermal Shutdown Hysteresis ∆TJ –1 5 – ° C UVLO Enable Threshold V UVLO Increasing VCC 2.45 2.7 2.95 V UVLO Hysteresis ∆VUVLO 0.05 0.10 – V Logic Supply Current I CC Outputs enabled – 50 65 mA Outputs off – – 9.0 mA Sleep mode – – 20 µA * Operation at a step frequency greater than the specifi ed minimum value is possible but not warranteed. † 8 microstep/step operation. NOTES: 1. Typical Data is for design information only. 2. Negative current is defi ned as coming out of (sourcing) the specifi ed device terminal. 3. E G = ([VREF/8] – VSENSE)/(VREF/8)

will be set by the PFD input (fast, slow or mixed decay). for home state conditions) and turns off all of the outputs. STEP inputs are ignored until the RESET input goes high. table 1. Changes to these inputs do not take effect until the STEP command (see figure). input will determine the direction of rotation of the motor. that limits the load current to a desired value (ITRIP ). (fast- or mixed-decay modes). (CT) connected from the RC timing terminal to ground.

Worcester, Massachusetts 01615-0036 (508) 853-5000 3967 MICROSTEPPING DRIVER WITH TRANSLATOR RC Blanking. In addition to the fixed off time of the PWM control circuit, the CT component sets the compara- tor blanking time. This function blanks the output of the current-sense comparator when the outputs are switched by the internal current-control circuitry. The comparator output is blanked to prevent false over-current detection due to reverse recovery currents of the clamp diodes, and/ or switching transients related to the capacitance of the load. The blank time t BLANK can be approximated by: tBLANK = 1400CT Enable Input (ENABLE). This active-low input enables all of the outputs. When logic high the outputs are disabled. Inputs to the translator (STEP, DIRECTION, MS 1, MS2) are all active independent of the ENABLE input state. Shutdown. In the event of a fault (excessive junction temperature) the outputs of the device are disabled until the fault condition is removed. At power up, and in the event of low VCC , the under-voltage lockout (UVLO) circuit disables the drivers and resets the translator to the home state. Sleep Mode (SLEEP). An active-low control input used to minimize power consumption when not in use. This disables much of the internal circuitry including the outputs. A logic high allows normal operation and startup of the device in the home position. Percent Fast Decay Input (PFD). When a STEP input signal commands a lower output current from the previous step, it switches the output current decay to either slow-, fast-, or mixed-decay depending on the voltage level at the PFD input. If the voltage at the PFD input is greater than 0.6V CC then slow-decay mode is selected. If the voltage on the PFD input is less than 0.21VCC then fast-decay mode is selected. Mixed decay is between these two levels. Mixed Decay Operation. If the voltage on the PFD input is between 0.6VCC and 0.21VCC , the bridge will operate in mixed-decay mode depending on the step sequence (see figures). As the trip point is reached, the device will go into fast-decay mode until the voltage on the RC terminal decays to the voltage applied to the PFD terminal. The time that the device operates in fast decay is approximated by: t FD = RTCTIn (0.6VCC/VPFD) After this fast decay portion, tFD , the device will switch to slow-decay mode for the remainder of the fixed off-time period. Functional Description (cont’d) 300 Dwg. GP-064-4 500 800400 OUTPUT CURRENT IN MILLIAMPERES 2.0 1.0 0.5 1.5 2.5 600 700 TA = +25°C SOURCE DRIVER SINK DRIVER OUTPUT SATURATION VOLTAGE IN VOLTS 200 Typical output saturation voltages showing Satlington™ sink-driver operation.

www.allegromicro.com 7 Timing Requirements (TA = +25°C, VCC = 5 V, Logic Levels are VCC and Ground) A B C D 50%STEP MS1/MS2/ DIR/RESET Dwg. WP-042 SLEEP E A. Minimum Command Active Time B. Minimum Command Active Time

Worcester, Massachusetts 01615-0036 (508) 853-5000 3967 MICROSTEPPING DRIVER WITH TRANSLATOR Layout. The printed wiring board should use a heavy ground plane. For optimum electrical and thermal performance, the driver should be soldered directly onto the board. The load supply terminal, VBB , should be decoupled with an electrolytic capacitor (>47 µF is recommended) placed as close to the device as possible. To avoid problems due to capacitive coupling of the high dv/dt switching transients, route the bridge-output traces away from the sensitive logic-input traces. Always drive the logic inputs with a low source impedance to increase noise immunity. Grounding. A star ground system located close to the driver is recommended. The 24-lead SOIC has the analog ground and the power ground internally bonded to the power tabs of the package (leads 6, 7, 18, and 19). Applications Information Current Sensing. To minimize inaccuracies caused by ground-trace IR drops in sensing the output current level, the current-sense resistor (RS) should have an independent ground return to the star ground of the device. This path should be as short as possible. For low-value sense resistors the IR drops in the printed wiring board sense resistor’s traces can be significant and should be taken into account. The use of sockets should be avoided as they can introduce variation in R S due to their contact resistance. Allegro MicroSystems recommends a value of RS given by R S = 0.5/ITRIP max Thermal protection. Circuitry turns off all drivers when the junction temperature reaches 165°C, typically. It is intended only to protect the device from failures due to excessive junction temperatures and should not imply that output short circuits are permitted. Thermal shut- down has a hysteresis of approximately 15°C. *R θJA = 35°C/W on JEDEC standard “High-K” four-layer board per JESD 51-7. †R θJA = 50°C/W on typical two-sided PCB with 1.3 square inches copper ground on each side. See also, Application Note 29501.5, Improving Batwing Power Dissipation.

Table 2. Step Sequencing

Worcester, Massachusetts 01615-0036 (508) 853-5000 3967 MICROSTEPPING DRIVER WITH TRANSLATOR Dwg. WK-004-19 PHASE 1 CURRENT PHASE 2 CURRENT STEP INPUT SLOW DECAY 70.7% –70.7% 70.7% –70.7% SLOW DECAY Full Step Operation MS1 = MS2 = L, DIR = H The vector addition of the output currents at any step is 100%.

www.allegromicro.com 11 Dwg. WK-004-18 PHASE 1 CURRENT PHASE 2 CURRENT STEP INPUT SLOW DECAY MIXED DECAY SLOW DECAY MIXED DECAY 100% –100% 100% –100% SLOW DECAY MIXED DECAY SLOW DECAY MIXED DECAY SLOW DECAY MIXED DECAY SLOW DECAY MIXED DECAY SLOW DECAY MIXED DECAY SLOW DECAY MIXED DECAY 70.7% –70.7% 70.7% –70.7% Half Step Operation MS1 = H, MS2 = L, DIR = H The mixed-decay mode is controlled by the percent fast decay voltage (V PFD ). If the voltage at the PFD input is greater than 0.6VCC then slow-decay mode is selected. If the voltage on the PFD input is less than 0.21VCC then fast-decay mode is selected. Mixed decay is between these two levels.

Worcester, Massachusetts 01615-0036 (508) 853-5000 3967 MICROSTEPPING DRIVER WITH TRANSLATOR Dwg. WK-004-17 PHASE 1 CURRENT PHASE 2 CURRENT STEP INPUT SLOW DECAY MIXED DECAY SLOW DECAY MIXED DECAY 100% –100% 100% –100% SLOW DECAY MIXED DECAY SLOW DECAY MIXED DECAY 38.3% 70.7% –70.7% 70.7% –70.7% –38.3% 38.3% –38.3% Quarter Step Operation MS1 = L, MS2 = H, DIR = H The mixed-decay mode is controlled by the percent fast decay voltage (V PFD ). If the voltage at the PFD input is greater than 0.6VCC then slow-decay mode is selected. If the voltage on the PFD input is less than 0.21VCC then fast-decay mode is selected. Mixed decay is between these two levels.

www.allegromicro.com 13 Dwg. WK-004-16 PHASE 2 CURRENT 100% –100% SLOW DECAY MIXED DECAY SLOW DECAY MIXED DECAY PHASE 1 CURRENT STEP INPUT SLOW DECAY MIXED DECAY SLOW DECAY MIXED DECAY 100% –100% 70.7% 38.3% –70.7% –38.3% 70.7% 38.3% –70.7% –38.3%

8 Microstep/Step Operation

MS1 = MS2 = H, DIR = H The mixed-decay mode is controlled by the percent fast decay voltage (V PFD ). If the voltage at the PFD input is greater than 0.6VCC then slow-decay mode is selected. If the voltage on the PFD input is less than 0.21VCC then fast-decay mode is selected. Mixed decay is between these two levels.

Worcester, Massachusetts 01615-0036 (508) 853-5000 3967 MICROSTEPPING DRIVER WITH TRANSLATOR Terminal List Terminal Terminal Name Terminal Description Number REF Gm reference input 1 RC2 Analog input for fixed offtime – bridge 2 2 SLEEP Logic input 3 OUT 2B H bridge 2 output B 4 LOAD SUPPLY2 VBB2, the load supply for bridge 2 5 GND Analog and power ground 6, 7 SENSE

2 Sense resistor for bridge 2 8

OUT2A H bridge 2 output A 9 STEP Logic input 10 DIR Logic Input 11 MS

1 Logic input 12

LOGIC SUPPLY V CC, the logic supply voltage 14 ENABLE Logic input 15 OUT 1A H bridge 1 output A 16 SENSE1 Sense resistor for bridge 1 17 GND Analog and power ground 18, 19 LOAD SUPPLY

1 VBB1, the load supply for bridge 1 20

OUT1B H bridge 1 output B 21 RESET Logic input 22 RC

1 Analog Input for fixed offtime – bridge 1 23

PFD Mixed decay setting 24

www.allegromicro.com 15 NOTES: 1. Exact body and lead configuration at vendor’s option within limits shown. 2. Lead spacing tolerance is non-cumulative. 3. Webbed lead frame. Leads 6, 7, 18, and 19 are internally one piece. 4. Supplied in standard sticks/tubes of 31 devices or add “TR ” to part number for tape and reel. 0° TO 8° 24 13 2 3 0.2992 0.2914 0.6141 0.5985 0.419 0.394 0.020 0.013 0.0926 0.1043 0.0040 MIN. 0.0125 0.0091 Dwg. MA-008-25A in 0.050 BSC NOTE 1 NOTE 3 0.050 0.016 0° TO 8° 2 3 7.60 7.40 15.60 15.20 10.65 10.00 0.51 0.33 2.65 2.35 0.10 MIN. 0.32 0.23 1.27 BSC NOTE 1 NOTE 3 1.27 0.40 Dwg. MA-008-25A mm Dimensions in Inches (for reference only) Dimensions in Millimeters (controlling dimensions)

Worcester, Massachusetts 01615-0036 (508) 853-5000 3967 MICROSTEPPING DRIVER WITH TRANSLATOR The products described here are manufactured under one or more Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the information being relied upon is current. Allegro products are not authorized for use as critical components in life-support devices or systems without express written approval. The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsi- bility for its use; nor for any infringement of patents or other rights of third parties which may result from its use.