2SK615 PANASONIC

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Technical content

Silicon MOS FETs (Small Signal) unit: mm 2SK615 Silicon N-Channel MOS FET For switching n Features l Low ON-resistance l High-speed switching l Allowing to be driven directly by CMOS and TTL l M type package, allowing easy automatic and manual insertion as well as stand-alone fixing to the printed circuit board. n Absolute Maximum Ratings (Ta = 25°C) Parameter Drain to Source voltage Gate to Source voltage Drain current Max drain current Allowable power dissipation Channel temperature Storage temperature Symbol V DS V GSO ID IDP PD * Tch Tstg Ratings ±0.5 150 -55 to +150 Unit V V A A W n Electrical Characteristics (Ta = 25°C) Parameter Drain to Source cut-off current Gate to Source leakage current Drain to Source breakdown voltage Gate threshold voltage Drain to Source ON-resistance Forward transfer admittance Input capacitance (Common Source) Output capacitance (Common Source) Reverse transfer capacitance (Common Source) Turn-on time Turn-off time Symbol IDSS IGSS V DSS V th R DS(on)*1 | Yfs | C iss C oss C rss ton*1, 2 toff*1, 2 Conditions V DS = 60V, VGS = 0 V GS = 20V, VDS = 0 IDS = 100mA, VGS = 0 ID = 1mA, VDS = VGS ID = 0.5A, VGS = 10V ID = 0.2A, VDS = 15V, f = 1kHz V DS = 10V, VGS = 0, f = 1MHz *1 Pulse measurement *2 ton, toff measurement circuit min 1.5 typ 300 Unit mA mA V V W mS pF pF pF ns ns max 0.1 3.5 Vin = 10V t = 1mS f = 1MH Z 50W 68W ton toff Vin 10% 90% 10% 90%Vout Vin VoutVDD = 30V Vout 1: Gate 2: Drain 3: Source EIAJ: SC-71 M Type Mold Package 6.9±0.1 0.55±0.1 0.45±0.05 1.0±0.1 1.0 2.5±0.1 1.0 1.5 1.5 R0.9 R0.9 R0.7 0.4 0.85 4.1±0.2 4.5±0.1 2.5 2.5 123 * PC board: Copper foil of the drain portion should have a area of 1cm2 or more and the board thickness should be 1.7mm.

Silicon MOS FETs (Small Signal) PD ¾ Ta I D ¾ VDS ID ¾ VGS | Yfs | ¾ VGS C iss, Coss, Crss ¾ VDS R DS(on) ¾ VGS R DS(on) ¾ Ta 2SK615 0 160 40 120 80 14020 100 60 1.6 1.2 0.4 1.0 1.4 0.8 0.2 0.6 Copper foil of the drain portion should have a area of 1cm2 or more and the board thickness should be 1.7mm. Ambient temperature Ta (˚C) Allowable power dissipation PD (W ) 01 0 826 4 1.2 1.0 0.8 0.6 0.4 0.2 Ta=25˚C 4.5V 3.5V VGS =5.5V Drain to source voltage VDS (V) Drain current ID (A) 01 0 826 4 1.2 1.0 0.8 0.6 0.4 0.2 VDS =10V Ta=25˚C Gate to source voltage VGS (V) Drain current ID (A) 06 5413 2 600 500 400 300 200 100 VDS =15V f=1kHz Ta=25˚C Gate to source voltage VGS (V) Forward transfer admittance |Yfs| (mS ) 1 10 100 10003 30 300 120 100 VGS =0 f=1MHz Ta=25˚C C iss C oss C rss Drain to source voltage VDS (V) Input capacitance (Common source), Output capacitance (Common source), Reverse transfer capacitance (Common source) Ciss,Coss,Crss (pF) 02 0 1641 2 8 Ta=75˚C 25˚C –25˚C ID =500mA Gate to source voltage VGS (V) Drain to source ON-resistance RDS(on) (W ) –50 75 50–25 25 0 ID =500mA VGS =5V 10V Ambient temperature Ta (˚C) Drain to source ON-resistance RDS(on) (W )