Download PDF2N7002_07 SUTEX
Document overview
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Technical content
Features
Free from secondary breakdown Low power drive requirement Ease of paralleling Low C ISS and fast switching speeds Excellent thermal stability Integral Source-Drain diode High input impedance and high gain Complementary N- and P-Channel devices
Applications
Amplifi ers Switches Power supply circuits Drivers (relays, hammers, solenoids, lamps, memories, displays, bipolar transistors, etc.) General Description The Supertex 2N7002 is an enhancement-mode (normally- off) transistor that utilizes a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors, and the high input impedance and positive temperature coeffi cient inherent in MOS devices. Characteristic of all MOS structures, this device is free from thermal runaway and thermally-induced secondary breakdown. Supertex’s vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where very low threshold voltage, high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired.
Ordering Information
Device Package BVDSS/BVDGS (V) RDS(ON) (max) (Ω) ID(ON) (min) (A) 2N7002 TO-236AB (same as SOT-23) 60 7.5 0.5 2N7002-G Absolute Maximum Ratings Parameter Value DRAIN to SOURCE voltage BV DSS DRAIN to GATE voltage BV DGS GATE to SOURCE voltage ±30V Operating and storage temperature -55°C to +150°C Soldering temperature 1 +300°C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground. Notes: 1. Distance of 1.6mm from case for 10 seconds. Pin Confi guration N-Channel Enhancement-Mode Vertical DMOS FETs -G indicates package is RoHS compliant (‘Green’) TO-236AB (Top View) GATE SOURCE DRAIN Product Marking = 2-week alpha date code702
Electrical Characteristics (TA=25°C unless otherwise specifi ed) Symbol Parameter Min Typ Max Units Conditions BVDSS Drain-to-source breakdown voltage 60 - - V V GS = 0V, ID = 10µA VGS(th) Gate threshold voltage 1.0 - 2.5 V V GS = VDS, ID = 250µA ∆VGS(th) Change in VGS(th) with temperature - - -5.5 mV/ OCV GS = VDS, ID = 250µA IGSS Gate body leakage current - - ±100 nA V GS = ±20V, VDS = 0V IDSS Zero gate voltage drain current - - 1.0 µA VGS = 0V, VDS = Max rating - - 500 VGS = 0V, VDS = 0.8Max rating, TA = 125OC ID(ON) ON-state drain current 500 - - mA V GS = 10V, VDS = 25V RDS(ON) Static drain-to-source ON-state resistance - - 7.5 Ω VGS = 5.0V, ID = 50mA - - 7.5 V GS = 10V, ID = 500mA ∆RDS(ON) Change in RDS(ON) with temperature - - 1.0 %/ OCV GS = 10V, ID = 500mA GFS Forward transconductance 80 - - mmho V DS = 25V, ID = 500mA CISS Input capacitance - - 50 pF VGS = 0V, VDS = 25V, f = 1.0MHz COSS Common source output capacitance - - 25 CRSS Reverse transfer capacitance - - 5 t(ON) Turn-ON time - - 20 ns VDD = 30V, ID = 200mA, RGEN = 25Ωt(OFF) Turn-OFF time - - 20 VSD Diode forward voltage drop - 1.2 - V V GS = 0V, ISD = 200mA trr Reverse recovery time - 400 - ns V GS = 0V, ISD = 800mA Notes: 2.All A.C. parameters sample tested. Switching Waveforms and Test Circuit Thermal Characteristics Device Package ID (continuous)* (mA) ID (pulsed) (mA) Power Dissipation @TA = 25OC (W) θjc (OC/W) θja (OC/W) IDR (mA) IDRM (mA) 2N7002 TO-236AB 115 800 0.36 200 350 115 800 Notes: * ID (continuous) is limited by max rated TJ. 90% 10% 90% 90% 10%10% PULSE GENERATOR VDD RL OUTPUT D.U.T. t(ON) td(ON) t(OFF) td(OFF) tFtr INPUT INPUT OUTPUT 10V VDD RGEN
Typical Performance Curves Output Characteristics 2.0 1.6 1.2 0.8 0.4 VDS (volts) ID )serepma( Saturation Characteristics VDS (volts) ID )serepma( Maximum Rated Safe Operating Area 0.1 100 101 1.0 0.1 0.01 0.001 VDS (volts) ID )serepma( Thermal Response Characteristics )dezilamron( ecnatsiseR lamrehT 1.0 0.8 0.6 0.4 0.2 0.001 10 0.01 0.1 1.0 tp (seconds) T ransconductance vs. Drain Current 0.5 0.4 0.3 0.2 0.1 0 0.4 0.2 G SF )snemeis( ID (amperes) Power Dissipation vs. Temperature 01 5 0 10050 0.5 0.4 0.3 0.2 0.1 1257525 TA(OC) PD )sttaw( SOT-23 TA = 25 OC PD = 0.36W SOT-23 TA = -55OC TA = 25OC VDS = 25V 01 0 2 0 3 0 5 0 40 0246 1 0 8 25OC 125OC 0.6 1.0 0.8 10V 2.0 1.6 1.2 0.8 0.4 10V SOT-23 (DC) SOT-23 (pulsed) VGS = VGS =
Typical Performance Curves (cont.) Gate Drive Dynamic Characteristics QG (nanocoulombs) V SG )stlov( Tj (OC) V )ht(SG )dezilamron( )NO(SDR) dezilamron( VGS(th) and RDS(ON) Variation with Temperature On-Resistance vs. Drain Current R )NO(SD )smho( VB SSD )dezilamron( T Transfer Characteristics VGS (volts) ID )serepma( Capacitance vs. Drain-to-Source Voltage )sdarafocip( C VDS (volts) ID (amperes) BVDSS Variation with Temperature 0 1 02 03 04 0 02468 1 0 2.0 1.6 1.2 0.8 0.4 -50 0 50 100 150 1.1 1.0 1.4 1.2 1.0 0.8 0.6 -50 0 50 100 150 30 pF VDS = 40V VDS = 10V VGS = 5V VGS = 10V TA = -55OC VDS = 25V 125OC f = 1MHz CISS COSS CRSS 0.9 90 pF 2.0 1.6 1.2 0.8 0.4 VGS(th) @ 1mA 25OC RDS(ON) @ 10V, 0.5A Tj (OC)
(The package drawing(s) in this data sheet may not refl ect the most current specifi cations. For the latest package outline information go to http://www.supertex.com/packaging.html.) 0.0173 ± 0.0027 (0.4394 ± 0.0685) 0.0906 ± 0.0079 (2.299 ± 0.199) 0.0754 ± 0.0053 (1.915 ± 0.135) 0.0512 ± 0.004 (1.3004 ± 0.1016) 0.0207 ± 0.003 (0.5257 ± 0.0762) 0.115 ± 0.005 (2.920 ± 0.121) 0.0400 ± 0.007 (1.016 ± 0.178) 0.0210 ± 0.003 (0.5334 ± 0.076) 0.0382 ± 0.003 (0.9690 ± 0.0762) 0.0035 ± 0.0025 (0.0889 ± 0.0635) 0.0043 ± 0.0009 (0.1092 ± 0.0229) NOM0.0197 (0.50) Dimensions in Inches (Dimensions in Millimeters)Measurement Legend = Top View Side View End View Doc.# DSFP-2N7002 A042507