2N7000 MOTOROLA

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1Motorola Small–Signal Transistors, FETs and Diodes Device Data /C0084/C0077/C0079/C0083 /C0070/C0069/C0084 /C0084/C0114/C0097/C0110/C0115/C0105/C0115/C0116/C0111/C0114 N–Channel — Enhancement MAXIMUM RATINGS Rating Symbol Value Unit Drain Source Voltage VDSS 60 Vdc Drain–Gate Voltage (RGS = 1.0 MΩ ) VDGR 60 Vdc Gate–Source Voltage — Continuous — Non–repetitive (tp ≤ 50 µs) VGS VGSM ± 20 ± 40 Vdc Vpk Drain Current Continuous Pulsed ID IDM 200 500 mAdc Total Power Dissipation @ TC = 25°C Derate above 25°C PD 350 2.8 mW mW/ °C Operating and Storage Temperature Range TJ, Tstg –55 to +150 °C THERMAL CHARACTERISTICS Characteristic Symbol Max Unit Thermal Resistance, Junction to Ambient R θJA 357 °C/W Maximum Lead Temperature for Soldering Purposes, 1/16″ from case for 10 seconds TL 300 °C ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted) Characteristic Symbol Min Max Unit OFF CHARACTERISTICS Drain–Source Breakdown Voltage (VGS = 0, ID = 10 µAdc) V(BR)DSS 60 — Vdc Zero Gate Voltage Drain Current (VDS = 48 Vdc, VGS = 0) (VDS = 48 Vdc, VGS = 0, TJ = 125°C) IDSS 1.0 1.0 µAdc mAdc Gate–Body Leakage Current, Forward (VGSF = 15 Vdc, VDS = 0) IGSSF — –10 nAdc ON CHARACTERISTICS (1) Gate Threshold Voltage (VDS = VGS , ID = 1.0 mAdc) VGS(th) 0.8 3.0 Vdc Static Drain–Source On–Resistance (VGS = 10 Vdc, ID = 0.5 Adc) (VGS = 4.5 Vdc, ID = 75 mAdc) rDS(on) 5.0 6.0 Ohm Drain–Source On–Voltage (VGS = 10 Vdc, ID = 0.5 Adc) (VGS = 4.5 Vdc, ID = 75 mAdc) VDS(on) 2.5 0.45 Vdc 1. Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2.0%. Preferred devices are Motorola recommended choices for future use and best overall value. Order this document by 2N7000/D /C0077/C0079/C0084/C0079/C0082/C0079/C0076/C0065 SEMICONDUCTOR TECHNICAL DATA  Motorola, Inc. 1997 CASE 29–04, STYLE 22 TO–92 (TO–226AA) 2 3 /C0050/C0078/C0055/C0048/C0048/C0048 Motorola Preferred Device

3 DRAIN

1 SOURCE

2 Motorola Small–Signal Transistors, FETs and Diodes Device Data

  1. Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2.0%.

Figure 1. Ohmic Region Figure 2. Transfer Characteristics Figure 3. Temperature versus Static Figure 4. Temperature versus Gate

/C0050/C0078/C0055/C0048/C0048/C0048 3Motorola Small–Signal Transistors, FETs and Diodes Device Data PACKAGE DIMENSIONS NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. CONTOUR OF PACKAGE BEYOND DIMENSION R IS UNCONTROLLED. 4. DIMENSION F APPLIES BETWEEN P AND L. DIMENSION D AND J APPLY BETWEEN L AND K MINIMUM. LEAD DIMENSION IS UNCONTROLLED IN P AND BEYOND DIMENSION K MINIMUM. R A P J L F B K G H SECTION X–X CV D N N XX SEATING PLANE DIM MIN MAX MIN MAX MILLIMETERSINCHES A 0.175 0.205 4.45 5.20 B 0.170 0.210 4.32 5.33 C 0.125 0.165 3.18 4.19 D 0.016 0.022 0.41 0.55 F 0.016 0.019 0.41 0.48 G 0.045 0.055 1.15 1.39 H 0.095 0.105 2.42 2.66 J 0.015 0.020 0.39 0.50 N 0.080 0.105 2.04 2.66 CASE 029–04 (TO–226AA) ISSUE AD STYLE 22: PIN 1. SOURCE 2. GATE 3. DRAIN

/C0050/C0078/C0055/C0048/C0048/C0048

4 Motorola Small–Signal Transistors, FETs and Diodes Device Data

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