2N2323 MICROSEMI

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SILICON CONTROLLED RECTIFIER Qualified per MIL-PRF-19500/276 Devices Qualified Level 2N2323 2N2323S 2N2323A 2N2323AS 2N2324 2N2324S 2N2324A 2N2324AS 2N2326 2N2326S 2N2326A 2N2326AS 2N2328 2N2328S 2N2328A 2N2328AS 2N2329 2N2329S JAN JANTX JANTXV MAXIMUM RATINGS Ratings Sym 2N2323,S/ 2N2323A,S 2N2324,S/ 2N2324A,S 2N2326,S/ 2N2326A,S 2N2328,S/ 2N2328A,S 2N2329,S Unit Reverse Voltage V RM 50 100 200 300 400 Vdc Working Peak Reverse Voltage V RM 75 150 300 400 500 Vpk Forwar d Blocking Voltage V FBXM 50 (3/4) 100 (3/4) 200 (3/4) 300 (3/4) 400 (3) Vpk Average Forward Current (1) IO 0.22 Adc Forward Current Surge Peak (2) IFSM 15 Adc Cathode - Gate Current V KGM 6 Vpk Operating Temperature T op - 65 to +125 0 C Storage Junction Te mp T stg - 65 to +150 0 C 1) This average forward current is for an ambient temperature of 80 0 C and 180 electrical degrees of conduction. 2) Surge current is non - recurrent. The rate of rise of peak surge current shall not exceed 40 A during the first 5 µs after switching from the ‘off’ (blocking) to the ‘on’ (conducting) state. This is measured from the point where the thyristor voltage has decayed to 90% of its initial blocking value. 3) Gate connected to cathode through 1,000 ohm resistor. 4) Gate connected to cathod e through 2,000 ohm resistor. TO - 5 *See appendix A for package outline

ELECTRICAL CHARACTERISTICS

Characteristics Symbol Min. Max. Unit SUBGROUP 2 TESTING Reverse Blocking Current R 2 = 1 k µ 2N2323 thru 2N2329 2N2323S thru 2N2329S R 2 = 2 k µ 2N2323A thru 2N2328A 2N2323AS thru 2N2328AS V R = 50 Vdc 2N2323, S, A, AS V R = 100 Vdc 2N2324, S, A, AS V R = 200 Vdc 2N2326, S, A, AS V R = 300 Vdc 2N2328, S, A, AS V R = 400 Vdc 2N2329, S, IRBX1 10 µAdc

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2N2323, A, AS, S; 2N2324, A, AS, S; 2N2326, A, AS, S; 2N2328, A, AS, S; 2N232, S JAN SERIES ELECTRICAL CHARACTERISTICS (con’t) Characteristics Symbol Min. Max. Unit Forward Blocking Current R 2 = 1 k Ω 2N2323 thru 2N2329 2N2323S thru 2N2329S R 2 = 2 k Ω 2N2323A thru 2N2328A 2N2323AS thru 2N2328AS V R = 50 Vdc 2N2323, S, A, AS V R = 100 Vdc 2N2324, S, A, AS V R = 200 Vdc 2N2326, S, A, AS V R = 300 Vdc 2N2328, S, A, AS V R = 400 Vdc 2N2329, S IFBX1 10 µAdc Reverse Gate Current V KG = 6 Vdc IKG 200 µAdc Gate Trigger Voltage and Current V 2 = V FBX = 6 Vdc; R L = 100 Ω R e = 1 k Ω 2N2323 thru 2N2329 and 2N2323S thru 2N2329S R e = 2 k Ω 2N2323A thru 2N2328A and 2N2323AS thru 2N2328AS V GT1 IGT1 V GT1 IGT1 0.35 0.35 0.80 200 0.60 Vdc µAdc Vdc µAdc SUBGROUP 4 TESTING Exponential Rate of Voltage Rise T A = 125 0 C 50 Ω ≤ R L ≤ 400 Ω , C = 0.1 to 1.0 µF, repeti tion rate = 60 pps, test duration = 15 seconds dv/dt = 1.8 v/ µs, R 3 = 1 k Ω 2N2323 thru 2N2329 and 2N2323S thru 2N2329S dv/dt = 0.7 v/ µs, R 3 = 2 k Ω 2N2323A thru 2N2328A and 2N2323AS thru 2N2328AS V AA = 50 Vdc 2N2323, S, A, AS V AA = 100 V dc 2N2324, S, A, AS V AA = 200 Vdc 2N2326, S, A, AS V AA = 300 Vdc 2N2328, S, A, AS V AA = 400 Vdc 2N2329, S V FBX 190 285 380 Vdc Forward “on” Voltage i FM = 4a (pk) (pulse), pulse width = 8.5 ms, max; duty cycle = 2% max V FM 2.2 V(pk ) Holding Current V AA = 24 Vdc max, I F1 = 100 mAdc, I F2 = 10 mAdc Gate trigger source voltage = 6 Vdc, trigger pulse width = 25 µs min., R 2 = 330 Ω R 3 = 1 k Ω 2N2323 thru 2N2329 and 2N2323S thru 2N2329S R 3 = 2 k Ω 2N2323A thru 2N2328A and 2N2323AS thru 2N2328AS IHOX 2.0 mAdc

6 Lake Street, Lawrence, MA 01841

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