CAT24WC128 CATALYST
Document overview
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Technical content
DESCRIPTION
The CAT24WC128 is a 128K-bit Serial CMOS E2PROM internally organized as 16384 words of 8 bits each. Catalyst’s advanced CMOS technology substantially reduces device power requirements. The Preliminary * Catalyst Semiconductor is licensed by Philips Corporation to carry the I2C Bus Protocol. I Write Protect Feature – Entire Array Protected When WP at V IH I 100,000 Program/Erase Cycles I 100 Year Data Retention I 8-Pin DIP, 8-Pin SOIC or 14-pin TSSOP CAT24WC128 features a 64-byte page write buffer. The device operates via the I2C bus serial interface and is available in 8-pin DIP, 8-pin SOIC or 14-pin TSSOP packages. PIN CONFIGURATION BLOCK DIAGRAM PIN FUNCTIONS Pin Name Function SDA Serial Data/Address SCL Serial Clock WP Write Protect VCC +1.8V to +6V Power Supply VSS Ground 24WC128 F02 CAT24WC128 128K-Bit I2C Serial CMOS E2PROM I 1MHz I2C Bus Compatible* I 1.8 to 6 Volt Operation I Low Power CMOS Technology I 64-Byte Page Write Buffer I Self-Timed Write Cycle with Auto-Clear I Commercial, Industrial and Automotive Temperature Ranges
FEATURES
© 1999 by Catalyst Semiconductor, Inc. Characteristics subject to change without notice NC NC VSS NC NC VCC WP SCL SDA NC VCC WP SCL SDA VSS NC D OUT ACK SENSE AMPS SHIFT REGISTERS CONTROL LOGIC WORD ADDRESS BUFFERS START/STOP LOGIC STATE COUNTERS E2PROM 256X512 VCC EXTERNAL LOAD COLUMN DECODERS XDEC DATA IN STORAGE HIGH VOLTAGE/ TIMING CONTROL VSS WP SCL SDA 256 512 Doc. No. 25060-00 6/99 S-1 NC NC NC NC NC 11 4 SDA WP NC NC NC SCL NC VSS VCC
2Doc. No. 25060-00 6/99 S-1 ABSOLUTE MAXIMUM RATINGS* Voltage on Any Pin with Package Power Dissipation *COMMENT Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions outside of those listed in the operational sections of this specification is not implied. Exposure to any absolute maximum rating for extended periods may affect device performance and reliability. RELIABILITY CHARACTERISTICS Symbol Parameter Min. Max. Units Reference Test Method N END (3) Endurance 100,000 Cycles/Byte MIL-STD-883, Test Method 1033 TDR (3) Data Retention 100 Years MIL-STD-883, Test Method 1008 VZAP (3) ESD Susceptibility 2000 Volts MIL-STD-883, Test Method 3015 ILTH (3)(4) Latch-up 100 mA JEDEC Standard 17 CAPACITANCE TA = 25°C, f = 1.0 MHz, VCC = 5V Symbol Test Max. Units Conditions C I/O(3) Input/Output Capacitance (SDA) 8 pF V I/O = 0V C IN(3) Input Capacitance (SCL, WP) 6 pF V IN = 0V Note: (1) The minimum DC input voltage is –0.5V. During transitions, inputs may undershoot to –2.0V for periods of less than 20 ns. Maximum DC voltage on output pins is VCC +0.5V, which may overshoot to VCC + 2.0V for periods of less than 20ns. (2) Output shorted for no more than one second. No more than one output shorted at a time. (3) This parameter is tested initially and after a design or process change that affects the parameter. (4) Latch-up protection is provided for stresses up to 100 mA on address and data pins from –1V to V CC +1V. (5) Standby current (ISB ) = 0 µA (<900 nA). Limits Symbol Parameter Min. Typ. Max. Units Test Conditions ICC1 Power Supply Current - Read 1 mA f SCL = 100 KHz VCC =5V ICC2 Power Supply Current - Write 3m A f SCL = 100 KHz VCC =5V ISB (5) Standby Current 0 µAV IN = GND or VCC VCC =5V ILI Input Leakage Current 3 µAV IN = GND to VCC ILO Output Leakage Current 3 µAV OUT = GND to VCC VIL Input Low Voltage –1V CC x 0.3 V VIH Input High Voltage V CC x 0.7 V CC + 0.5 V VOL1 Output Low Voltage (VCC = +3.0V) 0.4 V I OL = 3.0 mA VOL2 Output Low Voltage (VCC = +1.8V) 0.5 V IOL = 1.5 mA D.C. OPERATING CHARACTERISTICS VCC = +1.8V to +6.0V, unless otherwise specified.
3 Doc. No. 25060-00 6/99 S-1 The write cycle time is the time from a valid stop condition of a write sequence to the end of the internal program/erase cycle. During the write cycle, the bus interface circuits are disabled, SDA is allowed to remain high, and the device does not respond to its slave address. Power-Up Timing (1)(2) Symbol Parameter Max. Units tPUR Power-Up to Read Operation 1 ms tPUW Power-Up to Write Operation 1 ms Note: (1) This parameter is tested initially and after a design or process change that affects the parameter. (2) t PUR and tPUW are the delays required from the time VCC is stable until the specified operation can be initiated. FUNCTIONAL DESCRIPTION The CAT24WC128 supports the I2C Bus data transmis- sion protocol. This Inter-Integrated Circuit Bus protocol defines any device that sends data to the bus to be a transmitter and any device receiving data to be a re- ceiver. The transfer is controlled by the Master device which generates the serial clock and all START and A.C. CHARACTERISTICS V CC = +1.8V to +6V, unless otherwise specified Output Load is 1 TTL Gate and 100pF Read & Write Cycle Limits FSCL Clock Frequency 100 400 1000 kHz and ACK Out tBUF (1) Time the Bus Must be Free Before 4.7 1.2 0.5 µs a New Transmission Can Start tHD:STA Start Condition Hold Time 4.0 0.6 0.25 µs tLOW Clock Low Period 4.7 1.2 0.6 µs tHIGH Clock High Period 4.0 0.6 0.4 µs tSU:STA Start Condition Setup Time 4.0 0.6 0.25 µs (for a Repeated Start Condition) tHD:DAT Data In Hold Time 0 0 0 ns tSU:DAT Data In Setup Time 100 100 100 ns tR (1) SDA and SCL Rise Time 1.0 0.3 0.3 µs tF(1) SDA and SCL Fall Time 300 300 100 ns tSU:STO Stop Condition Setup Time 4.7 0.6 0.25 µs tDH Data Out Hold Time 100 50 50 ns tWR Write Cycle Time 10 10 10 ms STOP conditions for bus access. The CAT24WC128 operates as a Slave device. Both the Master device and Slave device can operate as either transmitter or re- ceiver, but the Master device controls which mode is activated.
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Figure 3. Start/Stop Timing Figure 2. Write Cycle Timing Figure 1. Bus Timing
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5020 FHD F03
interpreted as a START or STOP condition. other open drain or open collector outputs.
depending on the state of the R/W bit. cycle, signaling that it received the 8 bits of data. Figure 4. Acknowledge Timing
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Figure 5. Slave Address Bits
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X is Don't Care, can be a '0' or a '1'.
8Doc. No. 25060-00 6/99 S-1
ORDERING INFORMATION
Notes: (1) The device used in the above example is a 24WC128KI-1.8TE13 (SOIC, Industrial Temperature, 1.8 Volt to 6 Volt Operating Voltage, Tape & Reel) Figure 10. Sequential Read Timing