LT1112_1 LINEAR

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Precision, Picoamp Input Op Amps The LT 1112 dual and LT1114 quad op amps achieve a new standard in combining low cost and outstanding precision specifications. The performance of the selected prime grades matches or exceeds competitive devices. In the design of the LT1112/ LT1114 however, particular emphasis has been placed on optimizing performance in the low cost plastic and SO packages. For example, the 75µV maximum offset voltage in these low cost packages is the lowest on any dual or quad non-chopper op amp. The LT1112/LT1114 also provide a full set of matching specifications, facilitating their use in such matching dependent applications as two and three op amp instru- mentation amplifiers. Another set of specifications is furnished at ± 1V supplies. This, combined with the low 320 µA supply current per amplifier, allows the LT1112/LT1114 to be powered by two nearly discharged AA cells. ■ Offset Voltage – Prime Grade: 60µV Max ■ Offset Voltage – Low Cost Grade (Including Surface Mount Dual/Quad): 75µV Max ■ Offset Voltage Drift: 0.5µV/°C Max ■ Input Bias Current: 250pA Max ■ 0.1Hz to 10Hz Noise: 0.3µVP-P, 2.2pAP-P ■ Supply Current per Amplifier: 400µA Max ■ CMRR: 120dB Min ■ Voltage Gain: 1 Million Min ■ Guaranteed Specs with ± 1.0V Supplies ■ Guaranteed Matching Specifications ■ SO-8 Package – Standard Pinout ■ LT1114 in Narrow Surface Mount Package ■ Picoampere/Microvolt Instrumentation ■ Two and Three Op Amp Instrumentation Amplifers ■ Thermocouple and Bridge Amplifiers ■ Low Frequency Active Filters ■ Photo Current Amplifiers ■ Battery-Powered Systems Protected by U.S. Patents 4,575,685; 4,775,884 and 4,837,496 Distribution of Input Offset Voltage (In All Packages) INPUT OFFSET VOLTAGE (µV) –70 PERCENT OF UNITS –10 30 –50 –30 10 50 70 VS = ±15V TA = 25°C LT1112/14 • TA02 1/2 LT1112 1/2 LT1112 LT1004-1.275k 0.1% 46.4k 0.1% 0.765V RX15k 2.000V LT1112/14 • TA01 TOTAL SUPPLY CURRENT = 700µA 2V REFERENCE: SOURCES 1.7mA, SINKS 5mA OPTIONAL RX = 300Ω INCREASES SOURCE CURRENT TO 5mA 0.765V REFERENCE: SOURCES 5mA, SINKS 0.5mA TEMPERATURE COEFFICIENT LIMITED BY REFERENCE = 20ppm/°C MINIMUM SUPPLY = 2.7V Dual Output, Buffered Reference (On Single 3V Supply) DESCRIPTIO UFEATURES APPLICATIO SU TYPICAL APPLICATIO U , LT, LTC and LTM are registered trademarks of Linear Technology Corporation.

TJMAX = 150°C, θJA = 190°C/W LT1112S8 LT1112IS8 LT1112MPS8 LT1112ACN8 LT1112CN8 LT1112IN8 1112 1112I 1112MP ORDER PART NUMBER ORDER PART NUMBER LT1114S LT1114IS LT1114ACN LT1114CN LT1114IN TJMAX = 150°C, θJA = 110°C/W J8 PACKAGE 8-LEAD CERDIP TJMAX = 160°C, θJA = 100°C/W TJMAX = 150°C, θJA = 150°C/W TOP VIEW OUT A –IN A +IN A OUT B –IN B +IN B N8 PACKAGE 8-LEAD PDIP A B TOP VIEW N PACKAGE 14-LEAD PDIP OUT A –IN A +IN A V +IN B –IN B OUT B OUT D –IN D +IN D V +IN C –IN C OUT C A D B C TOP VIEW OUT B –IN B +IN B OUT A –IN A +IN A V S8 PACKAGE 8-LEAD PLASTIC SO B A TOP VIEW S PACKAGE 16-LEAD PLASTIC SO (NARROW) OUT A –IN A +IN A V +IN B –IN B OUT B NC OUT D –IN D +IN D V +IN C –IN C OUT C NC A D B C (Note 1)ABSOLUTE AXI U RATI GSW WW U LT1112AMJ8 LT1112MJ8 TJMAX = 150°C, θJA = 130°C/W OBSOLETE PACKAGE Consider the N8 Package for Alternate Source LT1114AMJ LT1114MJ J PACKAGE 14-LEAD CERDIP TJMAX = 160°C, θJA = 80°C/W (J) OBSOLETE PACKAGE Consider the N Package for Alternate Source PACKAGE/ORDER I FOR ATIOUU W Consult LTC Marketing for parts specified with wider operating temperature ranges. Operating Temperature Range (Note 11) LT1112AM/LT1112M LT1114AM/LT1114M (OBSOLETE)... – 55°C to 125°C LT1112AC/LT1112C/LT1112S8 Specified Temperature Range (Note 12) LT1112AM/LT1112M LT1114AM/LT1114M (OBSOLETE)... –55 °C to 125°C LT1112AC/LT1112C/LT1112S8

SYMBOL PARAMETER CONDITIONS (Note 3) MIN TYP MAX MIN TYP MAX UNITS VOS Input Offset Voltage 20 60 25 75 µV VS = ± 1.0V 40 110 45 130 µV ∆VOS Long Term Input Offset 0.3 0.3 µV/Mo ∆Time Voltage Stability IOS Input Offset Current 50 180 60 230 pA LT1114S/LT1114IS 75 330 pA IB Input Bias Current ±70 ± 250 ± 80 ± 280 pA LT1114S/LT1114IS ± 100 ± 450 pA Input Noise Voltage Density f O = 10Hz (Note 10) 16 28 16 28 nV/ √Hz fO = 1000Hz (Note 10) 14 18 14 18 nV/ √Hz in Input Noise Current 0.1Hz to 10Hz 2.2 2.2 pA P-P Input Noise Current Density f O = 10Hz 0.030 0.030 pA/ √Hz fO = 1000Hz 0.008 0.008 pA/ √Hz VCM Input Voltage Range ± 13.5 ± 14.3 ± 13.5 ± 14.3 V CMRR Common Mode Rejection Ratio V CM = ± 13.5V 120 136 115 136 dB PSRR Power Supply Rejection Ratio V S = ±1.0V to ± 20V 116 126 114 126 dB Minimum Supply Voltage (Note 5) ± 1.0 ± 1.0 V RIN Input Resistance Differential Mode (Note 4) 20 50 15 40 M Ω Common Mode 800 700 G Ω AVOL Large-Signal Voltage Gain V O = ±12V, RL = 10kΩ 1000 5000 800 5000 V/mV VO = ±10V, RL = 2kΩ 800 1500 600 1300 V/mV VOUT Output Voltage Swing R L = 10kΩ ± 13.0 ± 14.0 ± 13.0 ± 14.0 V RL = 2kΩ ± 11.0 ± 12.4 ± 11.0 ± 12.4 V SR Slew Rate 0.16 0.30 0.16 0.30 V/ µs GBW Gain-Bandwidth Product f O = 10kHz 450 750 450 750 kHz IS Supply Current per Amplifier 350 400 350 450 µA VS = ±1.0V 320 370 320 420 µA Channel Separation f O = 10Hz 150 150 dB ∆VOS Offset Voltage Match (Note 6) 35 100 40 130 µV ∆IB+ Noninverting Bias Current Match 100 450 100 500 pA (Notes 6, 7) LT1114S/LT1114IS 120 680 pA ∆CMRR Common Mode Rejection Match (Notes 6, 8) 117 136 113 136 dB ∆PSRR Power Supply Rejection Match (Notes 6, 8) 114 130 112 130 dB VS = ±15V, VCM = 0V, TA = 25°C, unless otherwise noted. LT1112AM/AC LT1114AM/AC LT1112M/C/I LT1114M/C/I

ELECTRICAL CHARACTERISTICS

SYMBOL PARAMETER CONDITIONS (Note 3) MIN TYP MAX MIN TYP MAX UNITS VOS Input Offset Voltage ● 35 120 45 150 µV LT1112MPS8 ● 45 160 µV VS = ±1.2V ● 60 220 70 260 µV ∆VOS Average Input Offset Voltage Drift (Note 9) ● 0.15 0.5 0.20 0.75 µV/°C ∆Temp LT1112MPS8 ● 0.4 1.3 µV/°C IOS Input Offset Current ● 80 400 100 500 pA IB Input Bias Current ● ± 150 ± 600 ± 170 ± 700 pA VCM Input Voltage Range ● ± 13.5 ± 14.1 ± 13.5 ± 14.1 V CMRR Common Mode Rejection Ratio V CM = ± 13.5V ● 116 130 111 130 dB PSRR Power Supply Rejection Ratio V S = ± 1.2V to ± 20V ● 112 124 110 124 dB AVOL Large-Signal Voltage Gain V O = ± 12V, RL = 10kΩ ● 500 2500 400 2500 V/mV VO = ± 10V, RL = 2kΩ ● 200 600 170 500 V/mV VOUT Output Voltage Swing R L = 10kΩ ● ± 13.0 ± 13.85 ± 13.0 ± 13.85 V SR Slew Rate ● 0.12 0.22 0.12 0.22 V/ µs IS Supply Current per Amplifier ● 380 460 380 530 µA ∆VOS Offset Voltage Match (Note 6) ● 55 200 70 240 µV LT1112MPS8 ● 70 270 µV Offset Voltage Match Drift ● 0.2 0.7 0.3 1.0 µV/°C (Notes 6, 9) LT1112MPS8 ● 0.5 1.9 µV/°C ∆IB+ Noninverting Bias Current Match (Notes 6, 7) ● 150 750 170 850 pA ∆CMRR Common Mode Rejection Ratio (Notes 6, 8) ● 112 130 106 130 dB ∆PSRR Power Supply Rejection Ratio (Notes 6, 8) ● 109 126 106 126 dB The ● denotes the specifications which apply over the full operating temperature range of – 55°C ≤ TA ≤ 125°C, otherwise specifications are at TA = 25°C. VS = ±15V, unless otherwise noted. LT1112AMJ8 LT1114AMJ LT1112MJ8/MPS8 LT1114MJ The ● denotes the specifications which apply over the full operating temperature range of 0°C ≤ TA ≤ 70°C, otherwise specifications are at TA = 25°C. VS = ±15V, unless otherwise noted. SYMBOL PARAMETER CONDITIONS (Note 3) MIN TYP MAX MIN TYP MAX UNITS VOS Input Offset Voltage LT1112CN8 ● 27 100 30 125 µV LT1112S8, LT1114CN/S ● 35 125 45 150 µV VS = ± 1.2V ● 50 175 65 210 µV ∆VOS Average Input Offset Voltage Drift LT1112CN8 ● 0.15 0.5 0.2 0.75 µV/°C ∆Temp (Note 9) LT1112S8, LT1114CN/S ● 0.3 1.1 0.4 1.3 µV/°C IOS Input Offset Current ● 60 220 70 290 pA LT1114S ● 90 420 pA IB Input Bias Current ● ± 80 ± 300 ± 90 ± 350 pA LT1114S ● ± 115 ± 550 pA VCM Input Voltage Range ● ± 13.5 ± 14.2 ± 13.5 ± 14.2 V CMRR Common Mode Rejection Ratio V CM = ± 13.5V ● 118 133 113 133 dB PSRR Power Supply Rejection Ratio V S = ± 1.2V to ± 20V ● 114 125 112 125 dB AVOL Large-Signal Voltage Gain V O = ± 12V, RL = 10kΩ ● 800 4000 650 4000 V/mV VO = ± 10V, RL = 2kΩ ● 500 1300 400 1000 V/mV VOUT Output Voltage Swing R L = 10kΩ ● ± 13.0 ± 13.9 ± 13.0 ± 13.9 V SR Slew Rate ● 0.14 0.27 0.14 0.27 V/ µs LT1112ACN8 LT1114ACN LT1112CN8/S8/IS8 LT1114CN/S/IS

The ● denotes the specifications which apply over the full operating temperature range of 0°C ≤ TA ≤ 70°C, otherwise specifications are at TA = 25°C. VS = ±15V, unless otherwise noted. SYMBOL PARAMETER CONDITIONS (Note 3) MIN TYP MAX MIN TYP MAX UNITS IS Supply Current per Amplifier ● 370 440 370 500 µA ∆VOS Offset Voltage Match LT1112CN8 ● 45 170 55 210 µV (Note 6) LT1112S8, LT1114CN/S ● 55 220 70 270 µV Offset Voltage Match Drift LT1112N8 ● 0.2 0.7 0.3 1.0 µV/°C (Notes 6, 9) LT1112S8, LT1114CN/S ● 0.4 1.6 0.5 1.9 µV/°C ∆IB+ Noninverting Bias Current Match ● 120 530 135 620 pA (Notes 6, 7) LT1114S ● 160 880 pA ∆CMRR Common Mode Rejection Ratio (Notes 6, 8) ● 114 134 109 134 dB ∆PSRR Power Supply Rejection Ratio (Notes 6, 8) ● 110 128 108 128 dB LT1112ACN8 LT1114ACN LT1112CN8/S8/IS8 LT1114CN/S/IS SYMBOL PARAMETER CONDITIONS (Note 3) MIN TYP MAX MIN TYP MAX UNITS VOS Input Offset Voltage LT1112CN8/IN8 ● 30 110 35 135 µV LT1112S8/IS8, LT1114CN/S/IS ● 40 135 45 160 µV VS = ± 1.2V ● 55 200 60 240 µV ∆VOS Average Input Offset Voltage Drift LT1112CN8/IN8 ● 0.15 0.50 0.20 0.75 µV/°C ∆Temp LT1112S8/IS8, LT1114CN/S/IS ● 0.30 1.10 0.40 1.30 µV/°C IOS Input Offset Current ● 70 330 85 400 pA LT1114S/IS ● 110 600 pA IB Input Bias Current ● ± 110 ± 500 ± 120 ± 550 pA LT1114S/IS ● ± 150 ± 800 pA VCM Input Voltage Range ● ± 13.5 ± 14.1 ± 13.5 ± 14.1 V CMRR Common Mode Rejection Ratio V CM = ± 13.5V ● 117 132 112 132 dB PSRR Power Supply Rejection Ratio V S = ± 1.2V to ± 20V ● 113 125 111 125 dB AVOL Large-Signal Voltage Gain V O = ± 12V, RL = 10kΩ ● 700 3300 600 3300 V/mV VO = ± 10V, RL = 2kΩ ● 400 1100 300 900 V/mV VOUT Output Voltage Swing R L = 10kΩ ● ± 13.0 ± 13.85 ± 13.0 ± 13.85 V SR Slew Rate ● 0.13 0.24 0.13 0.24 V/ µs IS Supply Current per Amplifier ● 370 450 370 510 µA ∆VOS Offset Voltage Match LT1112CN8/IN8 ● 50 180 60 225 µV (Note 6) LT1112S8/IS8, LT1114CN/S/IS ● 60 230 70 270 µV Offset Voltage Match Drift LT1112CN8/IN8 ● 0.2 0.7 0.3 1.0 µV/°C (Notes 6) LT1112S8/IS8, LT1114CN/S/IS ● 0.4 1.6 0.5 1.9 µV/°C ∆IB+ Noninverting Bias Current Match ● 140 660 155 770 pA (Notes 6, 7) LT1114S/IS ● 190 1300 pA ∆CMRR Common Mode Rejection Ratio (Notes 6, 8) ● 113 133 109 133 dB ∆PSRR Power Supply Rejection Ratio (Notes 6, 8) ● 110 127 107 127 dB The ● denotes the specifications which apply over the full operating temperature range of –40 °C ≤ TA ≤ 85°C, otherwise specifications are at TA = 25°C. VS = ±15V, unless otherwise noted. (Note 12) LT1112ACN8 LT1114ACN LT1112CN8/IN8/S8/IS8 LT1114CN/S/IS Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: Differential input voltages greater than 1V will cause excessive current to flow through the input protection diodes unless limiting resistance is used. Note 3: Typical parameters are defined as the 60% yield of parameter distributions of individual amplifiers; i.e., out of 100 LT1114s (or 100 LT1112s) typically 240 op amps (or 120) will be better than the indicated specification. Note 4: This parameter is guaranteed by design and is not tested.

Note 5: Offset voltage, supply current and power supply rejection ratio are measured at the minimum supply voltage. Note 6: Matching parameters are the difference between amplifiers A and D and between B and C on the LT1114; between the two amplifiers on the LT1112. Note 7: This parameter is the difference between two noninverting input bias currents. Note 8: ∆CMRR and ∆PSRR are defined as follows: (1) CMRR and PSRR are measured in µV/V on the individual amplifiers. (2) The difference is calculated between the matching sides in µV/V. (3) The result is converted to dB. Note 9: This parameter is not 100% tested. Note 10: These parameters are not tested. More than 99% of the op amps tested during product characterization have passed the maximum limits. 100% passed at 1kHz. Note 11: The LT1112AC/LT1112C/LT1112S8/LT1112I and LT1114AC/ LT1114C/LT1114S/LT1114I are guaranteed functional over the temperature range of –40 °C to 85°C. Note 12: The LT1112AC/LT1112C/LT1112S8/LT1114AC/LT1114C/ LT1114S are guaranteed to meet specified performance from 0°C to 70°C and are designed, characterized and expected to meet specified performance from –40 °C to 85°C, but are not tested or QA sampled at these temperatures. The LT1112I/LT1114I are guaranteed to meet specified performance from –40 °C to 85°C. TYPICAL PERFOR A CE CHARACTERISTICS UW Input Bias and Offset Current, Noninverting Bias Current Match vs Temperature TEMPERATURE (°C) –75 –200INPUT BIAS, OFFSET, MATCH CURRENT (pA) –100 100 200 –50 –25 0 25 LT1112/14 • TPC01 50 75 100 125 ∆IB+ IOS IB (OVERCANCELLED) VS = ±15V IB (UNDERCANCELLED) Input Bias Current Over Common Mode Range Distribution of Input Bias Current (In All Packages Except LT1114S) INPUT OFFSET VOLTAGE (µV) –80 PERCENT OF UNITS –40 0 20 100 LT1112/14 • TPC06 –60 –20 40 60 80 TA = 25°C Drift with Temperature LT1112S8, LT1114N/S Distribution of Offset Voltage at V S = ± 1.0V (In All Packages) INPUT BIAS CURRENT (pA) –300 PERCENT OF UNITS10 –200 –100 0 100 LT1112/14 • TPC03 200 300 VS = ±15V TA = 25°C Drift with Temperature LT1112N8/J8, LT1114J OFFSET VOLTAGE DRIFT WITH TEMPERATURE (µV/°C) –0.8 PERCENT OF INPUTS 0.8 LT1112/14 • TPC04 –0.4 0 0.4 –0.6 –0.2 0.2 0.6

850 OP AMPS TESTED

100 LT1112J8

165 LT1112N8

80 LT1114J

VS = ±15V COMMON MODE INPUT VOLTAGE (V) –15 –150 INPUT BIAS CURRENT (pA) –100 –50 150 –10 –5 0 5 LT1112/14 • TPC02 10 15 100 +IB VCM VS = ±15V TA = 25°C RINCM = 800GΩ DEVICE WITH POSITIVE INPUT CURRENT DEVICE WITH NEGATIVE INPUT CURRENT OFFSET VOLTAGE DRIFT WITH TEMPERATURE (µV/°C) –1.4 PERCENT OF UNITS –0.6 0.2 0.6 LT1112/14 • TPC05 –1.0 –0.2 1.0 1.4

960 OP AMPS TESTED

240 LT1112S8

80 LT1114N

40 LT1114S

VS = ±15V

Distribution of Offset Voltage Match Drift (LT1112J8, LT1112N8, LT1114J Packages) Distribution of Offset Voltage Match ∆VOS, OFFSET VOLTAGE MATCH (µV) –100 PERCENT OF UNITS LT1112/14 • TPC07 –60 –20 20 10040–80 –4 0 0 80 VS = ±15V TA = 25°C OFFSET VOLTAGE MATCH DRIFT (µV/°C) –0.8 PERCENT ON UNITS –0.4 0 0.4 0.8 LT1112/14 • TPC08 –0.6 –0.2 0.2 0.6 VS = ±15V

342 PAIRS TESTED

OFFSET VOLTAGE MATCH DRIFT (µV/°C) –1.6 PERCENT OF UNITS –1.2 –0.8 –0.4 0 LT1112/14 • TPC09 0.4 0.8 1.2 1.6 VS = ±15V

364 PAIRS TESTED

Distribution of Offset Voltage Match Drift (LT1112S8, LT1114N, LT1114S Packages) TYPICAL PERFOR A CE CHARACTERISTICS UW 0.1Hz to 10Hz Noise 0.01Hz to 1Hz Noise Supply Current per Amplifier vs Supply Voltage TIME (MONTHS) CHANGE IN OFFSET VOLTAGE (µV) 1 234 LT1112/14 • TPC14 VS = ±15V TA = 25°C 2A Long Term Stability of Three Representative UnitsWarm-Up Drift SUPPLY VOLTAGE (V) SUPPLY CURRENT PER AMPLIFIER (µA) 400 500 ±20 LT1112/14 • TPC15 300 200 ±5 ±10 ±15 600 TA = 125°C TA = 25°C TA = –55 °C Noise Spectrum FREQUENCY (Hz) 100 1000 10 100 1000 LT1112/14 • TPC10 VOLTAGE NOISE DENSITY (nV/√Hz) CURRENT NOISE DENSITY (fA/√Hz) VS = ±1V TO ±20V TA = 25°C CURRENT NOISE VOLTAGE NOISE 1/fCORNER 2.5Hz 1/fCORNER 140Hz TIME (SEC) NOISE VOLTAGE (0.2µV/DIV) LT1112/14 • TPC11 2 4 6 10 VS = ±15V TA = 25°C TIME AFTER POWER ON (MINUTES) CHANGE IN OFFSET VOLTAGE (µV) 0.5 1.0 1.5 2.0 LT1112/14 • TPC13 2.5 VS = ±15V TA = 25°C LT1112S8, LT1114N/S PACKAGES LT1114J PACKAGE LT1112J8, N8 PACKAGES TIME (SEC) NOISE VOLTAGE (0.2µV/DIV) LT1112/14 • TPC12 20 40 60 100 VS = ±15V TA = 25°C

Voltage Swing with Respect to Supply Voltages Output Voltage Swing vs Load Current Minimum Supply Voltage vs Temp Voltage Gain at Minimum Supply Voltage OUTPUT CURRENT (mA) V+ – 1 LT1112/14 • TPC18 –6 –3 39 OUTPUT SWING (V) V+ – 2 V+ – 3 V– + 3 V– + 2 V– + 1 SINK SOURCE VS = ±1V TO ± 20V TA = 25°C MAX IL AT ±1V = 1.3mA AT ±1.5V = 3mA TEMPERATURE (°C) –75 COMMON MODE RANGE OR OUTPUT SWING (V) –25 LT1112/14 • TPC17 V+ – 0.2 25 125 V+ – 0.4 V+ – 0.6 V+ – 0.8 V+ – 1.0 V– + 0.8 V– + 0.6 V– + 0.4 V– + 0.2 VS = ±1V TO ±20V IL < 100µA SWING CM RANGE SWING CM RANGE TEMPERATURE (°C) –50 MINIMUM SUPPLY (V) 100 ±1.2 ±0.9 0 50 75 LT1112/14 • TPC16 ±1.0 ±1.1 –25 25 100 125 VOLTAGE GAIN (V/mV) TYPICAL PERFOR A CE CHARACTERISTICS UW Power Supply Rejection vs Frequency Voltage Gain OUTPUT VOLTAGE (V) –15 CHANGE IN OFFSET VOLTAGE (µV) –15 –10 –5 0 5 LT1112/14 • TPC19 10 15 –10 VS = ±15V TA = 25°C RL = 10k RL = 2k FREQUENCY (Hz) 0.1 POWER SUPPLY REJECTION RATIO (dB) 100 120 140 100 10k LT1112/14 • TPC23 11 0 1k 100k 1M VS = ±15V TA = 25°C POSITIVE SUPPLY NEGATIVE SUPPLY FREQUENCY (Hz) 100 120 1k 100k LT1112/14 • TPC22 10 100 10k 1M COMMON MODE REJECTION RATIO (dB) 140 VS = ±15V TA = 25°C Common Mode Rejection vs Frequency Channel Separation vs Frequency Gain, Phase Shift vs FrequencyVoltage Gain vs Frequency FREQUENCY (Hz) 0.01 VOLTAGE GAIN (dB) 100 LT1112/14 • TPC20 –20 1 100 10k 140 120 0.1 10M 10 1k 100k VS = ±15V TA = 25°C FREQUENCY (MHz) 0.01 –10 GAIN (dB) 0.1 1 10 LT1112/14 • TPC21 VS = ±15V TA = 25°C PHASE GAIN PHASE MARGIN = 70°C 200 140 120 100 160 180 PHASE SHIFT (DEG) FREQUENCY (Hz) CHANNEL SEPARATION (dB) 100 120 10k 160 LT1112/14 • TPC24 100 1M 140 10 100k1k VS = ±15V TA = 25°C AMP 1 IN UNITY-GAIN 20VP-P, RL = 2k AMP 2 IN GAIN = 1000 R S = 100Ω, RF = 100k

Slew Rate, Gain-Bandwidth Product and Phase Margin vs Temperature Closed-Loop Output Impedance Capacitive Loading Handling FREQUENCY (Hz)

0.001 OUTPUT IMPEDANCE (Ω)

0.01 0.1 1000 10 100 1k 10k LT1112/14 • TPC26 100k 1M 100 VS = ±15V TA = 25°C AV = 100 AV = +1 CAPACITIVE LOAD (µF) 0.00001 OVERSHOOT (%) 120 0.0001 0.001 0.01 0.1 LT1112/14 • TPC27 11 0 100 VS = ±15V TA = 25°C AV = 10 AV = +1 TEMPERATURE (°C) –50 600 GAIN-BANDWIDTH PRODUCT (kHz) 800 0.4 0 50 75 LT1112/14 • TPC25 700 0.3 0.2 –25 25 100 125 SLEW RATE (V/µs) PHASE MARGIN (DEG) φm GBW SLEW TYPICAL PERFOR A CE CHARACTERISTICS UW FREQUENCY (kHz) PEAK-TO-PEAK OUTPUT VOLTAGE (V) 10 100 1000 LT1112/14 • TPC30 VS = ±15V VS = ±5V TA = 25°C RL = 10k 20mV/DIV Large-Signal Transient Response 5V/DIV Small-Signal Transient Response 50µs/DIV2µs/DIV AV = +1 CL = 500pF VS = ±15V AV = +1 RF = 10k CF = 100pF VS = ±15V Undistorted Output Voltage vs Frequency

Voltage Follower with Input Exceeding the Common Mode Range (VS = ± 5V) INPUT: ± 5.2V Sine Wave LT1112 Output OP-297 Output The LT1112 dual and LT1114 quad in the plastic and ceramic DIP packages are pin compatible to and directly replace such precision op amps as the OP-200, OP-297, AD706 duals and OP-400, OP-497, AD704 quads with improved price/performance. The LT1112 in the S8 surface mount package has the standard pin configuration, i.e., the same configuration as the plastic and ceramic DIP packages. The LT1114 quad is offered in the narrow 16-pin surface mount package. All competitors are in the wide 16-pin package which occupies 1.8 times the area of the narrow package. The wide package is also 1.8 times thicker than the narrow package. The inputs of the LT1112/1114 are protected with back-to- back diodes. In the voltage follower configuration, when the input is driven by a fast large-signal pulse (>1V), the input protection diodes effectively short the output to the input during slewing, and a current, limited only by the output short-circuit protection, will flow through the diodes. The use of a feedback resistor is recommended because this resistor keeps the current below the short-circuit limit, resulting in faster recovery and settling of the output. The input voltage of the LT1112/1114 should never ex- ceed the supply voltages by more than a diode drop. However, the example below shows that as the input voltage exceeds the common mode range, the LT1112’s output clips cleanly, without any glitches or phase rever- sal. The OP-297 exhibits phase reversal. The photos also illustrate that both the input and output ranges of the LT1112 are within 800mV of the supplies. The effect of input and output overdrive on the other amplifiers in the LT1112 or LT1114 packages is negligible, as each amplifier is biased independently. Advantages of Matched Dual and Quad Op Amps In many applications the performance of a system de- pends on the matching between two operational amplifiers rather than the individual characteristics of the two op amps. Two or three op amp instrumentation amplifiers, tracking voltage references and low drift active filters are some of the circuits requiring matching between two op amps. The well-known triple op amp configuration illustrates these concepts. Output offset is a function of the difference between the offsets of the two halves of the LT1112. This error cancellation principle holds for a considerable num- ber of input referred parameters in addition to offset voltage and its drift with temperature. Input bias current will be the average of the two noninverting input currents B+). The difference between these two currents (∆IB+) is the offset current of the instrumentation amplifier. Com- mon mode and power supply rejections will be dependent only on the match between the two amplifiers (assuming perfect resistor matching). APPLICATIO S I FOR ATIOWU UU

The concepts of common mode and power supply rejec- tion ratio match (∆CMRR and ∆PSRR) are best demon- strated with a numerical example: Assume CMRRA = + 1µV/V or 120dB, and CMRRB = + 0.75µV/V or 122.5dB, then ∆CMRR = 0.25µV/V or 132dB; if CMRRB = – 0.75µV/V which is still 122.5dB, then ∆CMRR = 1.75µV/V or 115dB. Clearly the LT1112/LT1114, by specifying and guarantee- ing all of these matching parameters, can significantly improve the performance of matching-dependent circuits. Three Op Amp Instrumentation Amplifier APPLICATIO S I FOR ATIOWU UU 1/2 LT1112 OR 1/4 LT1114 A 1/2 LT1112 OR 1/4 LT1114 D IN– IN+ 10k 2.1k 200Ω 10k 100Ω 0.5% 100Ω 0.5% 33pF R10 10k 0.5% 9.88k 0.5% 200Ω OUTPUT LT1097 OR 1/4LT1114 B OR C GAIN = 1000 TRIM R8 FOR GAIN TRIM R9 FOR DC COMMON MODE REJECTION TRIM R10 FOR AC COMMON MODE REJECTION LT1112/14 • AI02 Typical performance of the instrumentation amplifier: Input offset voltage = 35µV Offset voltage drift = 0.3µV/°C Input bias current = 80pA Input offset current = 100pA Input resistance = 800GΩ Input noise = 0.42µV P-P When the instrumentation amplifier is used with high impedance sources, the LT1114 is recommended because its CMRR vs frequency performance is better than the LT1112’s. For example, with two matched 1M Ω source resistors, CMRR at 100Hz is 100dB with the LT1114, 76dB with the LT1112. This difference is explained by the fact that capacitance between adjacent pins on an IC package is about 0.25pF (including package, socket and PC board trace capaci- tances). On the dual op amp package, positive input A is next to the V– pin (AC ground), while positive input B has no AC ground pin adjacent to it, resulting in a 0.25pF input capacitance mismatch. At 100Hz, 0.25pF represents a 6.4 • 10 9 input impedance mismatch, which is only 76dB higher than the 1MΩ source resistors. On the quad package, all four inputs are adjacent to a power supply terminal—therefore, there is no mismatch.

(1/2 LT1112, 1/4 LT1114) 12pF 30k Q35 800Ω 30pF Q34 Q5 Q6 35µA 20µA Q22 Q21 Q8 Q4 Q13 SQ2 S S INVERTING INPUT NONINVERTING INPUT S Q10 Q11 50k 1.5k Q12 15µA 5µA 5µA 460Ω Q15Q14 460Ω460Ω Q17 Q25 Q19 Q27 1.5k Q33 Q29 80µA 28Ω 90Ω 30Ω Q20 OUT Q26 Q30 Q31 200Ω200Ω Q24 Q16 2.5k Q32 Q28 Q1 TO Q4 ARE SUPERGAIN TRANSISTORS LT1112/14 • SD01 10k Q18 30k Q23 SCHE ATIC DIAGRAWW

8-Lead CERDIP (Narrow .300 Inch, Hermetic) (Reference LTC DWG # 05-08-1110) J Package 14-Lead CERDIP (Narrow .300 Inch, Hermetic) (Reference LTC DWG # 05-08-1110) J8 0801 .014 – .026 (0.360 – 0.660) .200 (5.080) MAX .015 – .060 (0.381 – 1.524) .125 3.175 MIN.100 (2.54) BSC .300 BSC (7.62 BSC) .008 – .018 .005 (0.127) MIN .405 (10.287) MAX .220 – .310 (5.588 – 7.874) 12 3 4 87 65 .025 (0.635) RAD TYP .045 – .068 (1.143 – 1.650) FULL LEAD OPTION .023 – .045 (0.584 – 1.143) HALF LEAD OPTION CORNER LEADS OPTION (4 PLCS) .045 – .065 (1.143 – 1.651)NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE OR TIN PLATE LEADS J14 0801 .045 – .065 (1.143 – 1.651) .100 (2.54) BSC.014 – .026 (0.360 – 0.660) .200 (5.080) MAX .015 – .060 (0.381 – 1.524) .125 (3.175) MIN .300 BSC (7.62 BSC) .008 – .018 1 234 56 7 .220 – .310 (5.588 – 7.874) .785 (19.939) MAX.005 (0.127) MIN 14 11 8 91013 12 .025 (0.635) RAD TYP NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE OR TIN PLATE LEADS OBSOLETE PACKAGES

8-Lead PDIP (Narrow .300 Inch) (Reference LTC DWG # 05-08-1510) N Package 14-Lead PDIP (Narrow .300 Inch) (Reference LTC DWG # 05-08-1510) UPACKAGE DESCRIPTIO N8 1002 .065 (1.651) TYP .045 – .065 (1.143 – 1.651) .130 ± .005 (3.302 ± 0.127) .020 (0.508) MIN.018 ± .003 (0.457 ± 0.076) .120 (3.048) MIN 12 3 4 87 6 5 .255 ± .015* (6.477 ± 0.381) .400* (10.160) MAX .008 – .015 (0.203 – 0.381) .300 – .325 (7.620 – 8.255) .325 +.035 –.015 +0.889 –0.3818.255() NOTE: 1. DIMENSIONS ARE INCHES MILLIMETERS *THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm) .100 (2.54) BSC N14 1103 .020 (0.508) MIN .120 (3.048) MIN .130 ± .005 (3.302 ± 0.127) .045 – .065 (1.143 – 1.651) .065 (1.651) TYP .018 ± .003 (0.457 ± 0.076) .005 (0.127) MIN .255 ± .015* (6.477 ± 0.381) .770* (19.558) MAX 31 2 4 5 6 7 891011121314 .008 – .015 (0.203 – 0.381) .300 – .325 (7.620 – 8.255) .325 +.035 –.015 +0.889 –0.3818.255() NOTE: 1. DIMENSIONS ARE INCHES MILLIMETERS *THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm) .100 (2.54) BSC

Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 8-Lead Plastic Small Outline (Narrow .150 Inch) (Reference LTC DWG # 05-08-1610) S Package 16-Lead Plastic Small Outline (Narrow .150 Inch) (Reference LTC DWG # 05-08-1610) UPACKAGE DESCRIPTIO .016 – .050 (0.406 – 1.270) .010 – .020 0°– 8° TYP .008 – .010 (0.203 – 0.254) SO8 0303 .053 – .069 (1.346 – 1.752) .014 – .019 (0.355 – 0.483) TYP .004 – .010 (0.101 – 0.254) .050 (1.270) BSC 1 2 3 4 .150 – .157 (3.810 – 3.988) NOTE 3 8 7 6 5 .189 – .197 (4.801 – 5.004) NOTE 3 .228 – .244 (5.791 – 6.197) .245 MIN .160 ±.005 RECOMMENDED SOLDER PAD LAYOUT .045 ±.005 .050 BSC .030 ±.005 TYP INCHES (MILLIMETERS) NOTE: 1. DIMENSIONS IN 2. DRAWING NOT TO SCALE 3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm) .016 – .050 (0.406 – 1.270) .010 – .020 0° – 8° TYP .008 – .010 (0.203 – 0.254) N 2 3 4 5 6 7 8 N/2 .150 – .157 (3.810 – 3.988) NOTE 3 16 15 14 13 .386 – .394 (9.804 – 10.008) NOTE 3 .228 – .244 (5.791 – 6.197) 12 11 10 9 S16 0502 .053 – .069 (1.346 – 1.752) .014 – .019 (0.355 – 0.483) TYP .004 – .010 (0.101 – 0.254) .050 (1.270) BSC .245 MIN N 1 2 3 N/2 .160 ±.005 RECOMMENDED SOLDER PAD LAYOUT .045 ±.005 .050 BSC .030 ±.005 TYP INCHES (MILLIMETERS) NOTE: 1. DIMENSIONS IN 2. DRAWING NOT TO SCALE 3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)

LT 0207 REV B • PRINTED IN USA © LINEAR TECHNOLOGY CORPORATION 1 992 Dual Buffered ± 0.617V Reference Powered by Two AA Batteries 1/2 LT1112 15k RX* *OPTIONAL +1.5V 0.617V LT1004-1.2 100pF RY* *OPTIONAL –1.5V –0.617V TOTAL SUPPLY CURRENT = 700µA WORKS WITH BATTERIES DISCHARGED TO ±1.3V AT ±1.5V: MAXIMUM LOAD CURRENT = 800µA; CAN BE INCREASED WITH OPTIONAL RX, RY; AT RX = RY = 750Ω LOAD CURRENT = 2mA TEMPERATURE COEFFICIENT LIMITED BY REFERENCE = 20ppm/°C LT1112/14 • TA03 1/2 LT1112 20k 0.1% 20k 0.1% TYPICAL APPLICATIO U RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LT1880 Rail-to-Rail Output, Picoamp Input Precision Op Amp SOT-23 LT1881/LT1882 Dual/Quad Rail-to-Rail Output, Picoamp Input Precision C LOAD Up to 1000pF Op Amp LT1884/LT1885 Dual/Quad Rail-to-Rail Output, Picoamp Input Precision 9.5nV/ √Hz Input Noise Op Amp LT6011/LT6012 Dual/Quad Rail-to-Rail Output, Picoamp Input Precision 135 µA Supply Current, 14nV/√Hz Op Amp Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com