100344

100344 FAIRCHILD

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I Drives 25Ω load I Low power operation I 2000V ESD protection I Voltage compensated operating range = −4.2V to −5.7V Ordering Code: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagrams 24-Pin DIP 28-Pin PLCC Logic Symbol Order Number Package Number Package Description 100344PC N24E 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide 100344QC V28A 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square 100344QI V28A 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square Industrial Temperature Range ( −40°C to +85°C)

www.fairchildsemi.com 2 100344 Pin Descriptions Truth Table H = HIGH Voltage level L = LOW Voltage level Cutoff = lower-than-LOW state X = Don’t Care Note 1: Retains data present before either LE or E go HIGH. Logic Diagram Pin Names Description D 0–D 7 Data Inputs E Enable Input LE Latch Enable Input OEN Output Enable Input Q 0–Q 7 Data Outputs Inputs Outputs D n E LE OEN Q n LLL L L HL L L H X H X L Latched (Note 1) X X H L Latched (Note 1) X X X H Cutoff

3 www.fairchildsemi.com 100344 Absolute Maximum Ratings(Note 2) Recommended Operating Conditions Note 2: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum rating. The “Recommended Operating Conditions” table will define the conditions for actual device operation. Note 3: ESD testing conforms to MIL-STD-883, Method 3015. Commercial Version VEE = −4.2V to −5.7V, VCC = VCCA = GND, TC = 0°C to +85°C Note 4: The specified limits represent the “worst case” value for the parameter. Since these values normally occur at the temperature extremes, additional noise immunity and guardbanding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are cho- sen to guarantee operation under “worst case” conditions. VEE = −4.2V to −5.7V, VCC = VCCA = GND Note 5: The propagation delay specified is for single output switching. Delays may vary up to 300 ps with multiple outputs switching. Storage Temperature (TSTG ) −65°C to +150°C Maximum Junction Temperature (TJ) +150°C VEE Pin Potential to Ground Pin −7.0V to +0.5V Input Voltage (DC) V EE to +0.5V Output Current (DC Output HIGH) −100 mA ESD (Note 3) ≥2000V Case Temperature (TC ) Commercial 0 °C to +85°C Industrial −40°C to +85° Supply Voltage (VEE ) −5.7V to −4.2V Symbol Parameter Min Typ Max Units Conditions VOH Output HIGH Voltage −1025 −955 −870 mV V IN = VIH (Max) Loading with VOL Output LOW Voltage −1830 −1705 −1620 mV or V IL (Min) 25 Ω to −2.0V VOHC Output HIGH Voltage −1035 mV V IN = VIH (Min) Loading with VOLC Output LOW Voltage −1610 mV or V IL (Max) 25 Ω to −2.0V VOLZ Cutoff LOW Voltage −1950 mV V IN = VIH (Min) OEN = HIGH or VIL (Max) VIH Input HIGH Voltage −1165 −870 mV Guaranteed HIGH Signal for All Inputs VIL Input LOW Voltage −1830 −1475 mV Guaranteed LOW Signal for All Inputs IIL Input LOW Current 0.50 µAV IN = VIL (Min) IIH Input HIGH Current 240 µAV IN = VIH (Max) IEE Power Supply Current Inputs Open −178 −85 mA V EE = −4.2V to −4.8V −185 −85 V EE = −4.2V to −5.7V Symbol Parameter TC = 0°CT C = +25°CT C = +85°C Units Conditions Min Max Min Max Min Max tPLH Propagation Delay Figures 1, 2 tPHL D n to Output (Note 5) tPLH Propagation Delay Figures 1, 4 tPHL LE, E to Output (Note 5) ns Figures 1, 2 tTLH Transition Time tTHL 20% to 80%, 80% to 20% tS Setup Time D 0–D 7 1.00 1.00 1.10 ns Figures 1, 3 tH Hold Time D 0–D 7 0.10 0.10 0.10 ns Figures 1, 3 tPW (H) Pulse Width HIGH 2.00 2.00 2.00 ns Figures 1, 3 LE, E

www.fairchildsemi.com 4 100344 Commercial Version (Continued) VEE = −4.2V to −5.7V, VCC = VCCA = GND Note 6: The propagation delay specified is for single output switching. Delays may vary up to 300 ps with multiple outputs switching. Note 7: Output-to-Output Skew is defined as the absolute value of the difference between the actual propagation delay for any outputs within the same pack- aged device. The specifications apply to any outputs switching in the same direction either HIGH-to-LOW (tOSHL ), or LOW-to-HIGH (tOSLH ), or in opposite directions both HL and LH (tOST ). Parameters tOST and tps guaranteed by design. Symbol Parameter TC = 0°CT C = +25°CT C = +85°C Units Conditions Min Max Min Max Min Max tPLH Propagation Delay Figures 1, 2 tPHL D n to Output (Note 6) tPLH Propagation Delay Figures 1, 4 tPHL LE, E to Output (Note 6) ns Figures 1, 2 tTLH Transition Time tTHL 20% to 80%, 80% to 20% tS Setup Time D 0–D 7 0.90 0.90 1.00 ns Figures 1, 3 tH Hold Time D 0–D 7 0.00 0.00 0.00 ns Figures 1, 3 tPW (H) Pulse Width HIGH 2.00 2.00 2.00 ns Figures 1, 3 LE, E tOSHL Maximum Skew Common Edge PLCC Only Output-to-Output Variation 330 330 330 ps (Note 7) Data to Output Path tOSLH Maximum Skew Common Edge PLCC Only Output-to-Output Variation 330 330 330 ps (Note 7) Data to Output Path tOST Maximum Skew Opposite Edge PLCC Only Output-to-Output Variation 330 330 330 ps (Note 7) Data to Output Path tPS Maximum Skew PLCC Only Pin (Signal) Transition Variation 230 230 230 ps (Note 7) Data to Output Path

www.fairchildsemi.com 6 100344 Physical Dimensions inches (millimeters) unless otherwise noted 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide Package Number N24E

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100344 Low Power 8-Bit Latch with Cut-Off Drivers

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square Package Number V28A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD ’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea- sonably expected to result in a significant injury to the user. 2. A critical component in any component of a life support device or system whose failure to perform can be rea- sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com