100331 NSC

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n 35% power reduction of the 100131 n 2000V ESD protection n Pin/function compatible with 100131 n Voltage compensated operating range= −4.2V to −5.7V n Available to industrial grade temperature range n Available to Standard Microcircuit Drawing (SMD) 5962-9153601 Logic Symbol Pin Names Description CP 0–CP 2 Individual Clock Inputs CP C Common Clock Input D 0–D 2 Data Inputs CD 0–CD 2 Individual Direct Clear Inputs SD n Individual Direct Set Inputs MR Master Reset Input MS Master Set Input Q 0-Q2 Data Outputs Q 0–Q 2 Complementary Data Outputs Connection Diagrams DS100300-1 24-Pin DIP DS100300-2 24-Pin Quad Cerpak DS100300-3 August 1998

100331 Low Power Triple D Flip-Flop

© 1998 National Semiconductor Corporation DS100300 www.national.com

(Each Flip-Flop) Inputs Outputs D n CP n CP C MS MR Q n( t+1 ) SD n CD n L N LLL L H N LLL H LL N LL L HL N LL H X LLLL Qn(t) X H X L L Qn(t) X X H L L Qn(t) H = HIGH Voltage Level L = LOW Voltage Level X = Don’t Care U = Undefined t= Time before CP Positive Transition t+1 = Time after CP Positive Transition N = LOW to HIGH Transition Asynchronous Operation (Each Flip-Flop) Inputs Outputs D n CP n CP C MS MR Q n( t+1 ) SD n CD n XX X H L H XX X L H L XX X H H U DS100300-5 www.national.com 2

Absolute Maximum Ratings(Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Above which the useful life may be impaired Storage Temperature (T STG ) −65˚C to +150˚C Maximum Junction Temperature (TJ) Ceramic +175˚C Pin Potential to Ground Pin (VEE ) −7.0V to +0.5V Input Voltage (DC) V EE to +0.5V Output Current (DC Output HIGH) −50 mA ESD (Note 2) ≤ 2000V Recommended Operating Conditions Case Temperature (TC ) Military −55˚C to +125˚C Supply Voltage (VEE ) −5.7V to −4.2V Note 1:Absolute maximum ratings are those values beyond which the de- vice may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Note 2:ESD testing conforms to MIL-STD-883, Method 3015. Military Version VEE = −4.2V to −5.7V, VCC = VCCA = GND, TC = −55˚C to +125˚C Symbol Parameter Min Max Units T C Conditions Notes VOH Output HIGH Voltage −1025 −870 mV 0˚C to V IN = VIH (Max) or VIL (Min) Loading with 50Ω to −2.0V (Notes 3, 4, 5)+125˚C −1085 −870 mV −55˚C VOL Output LOW Voltage −1830 −1620 mV 0˚C to +125˚C −1830 −1555 mV −55˚C VOHC Output HIGH Voltage −1035 mV 0˚C to V IN = VIH (Min) or VIL (Max) Loading with 50Ω to −2.0V (Notes 3, 4, 5)+125˚C −1085 mV −55˚C VOLC Output LOW Voltage −1610 mV 0˚C to +125˚C −1555 mV −55˚C VIH Input HIGH Voltage −1165 −870 mV −55˚C to Guaranteed HIGH Signal (Notes 3, 4, 5, 6)+125˚C for all Inputs VIL Input LOW Voltage −1830 −1475 mV −55˚C to Guaranteed LOW Signal (Notes 3, 4, 5, 6)+125˚C for all Inputs IIL Input LOW Current 0.50 µA −55˚C to V EE = −4.2V (Notes 3, 4, 5)+125˚C V IN = VIL (Min) IIH Input HIGH Current 240 µA 0˚C to V EE = −5.7V VIN = VIH (Max) (Notes 3, 4, 5)+125˚C 340 µA −55˚C IEE Power Supply Current −130 −50 mA −55˚C to Inputs Open (Notes 3, 4, 5)+125˚C Note 3:F100K 300 Series cold temperature testing is performed by temperature soaking (to guarantee junction temperature equals −55˚C), then testing immediately without allowing for the junction temperature to stabilize due to heat dissipation after power-up. This provides “cold start” specs which can be considered a worst case condition at cold temperatures. Note 4:Screen tested 100% on each device at −55˚C, +25˚C, and +125˚C, Subgroups, 1, 2, 3, 7 and 8. Note 5:Sampled tested (Method 5005, Table I) on each manufactured lot at −55˚C, +25˚C, and +125˚C, Subgroups A1, 2, 3, 7 and 8. Note 6:Guaranteed by applying specified input condition and testing VOH /VOL . www.national.com3

VEE = −4.2V to −5.7V, VCC = VCCA = GND Symbol Parameter T C = −55˚C T C = +25˚C T C = +125˚C Units Conditions Notes Min Max Min Max Min Max fmax Toggle Frequency 400 400 400 MHz Figures 2, 3 (Note 10) tPHL CP C to Output Figures 1, 3 tPHL CP n to Output 1, 4 (Notes 7, 8, tPHL CD n,S Dn to Output ns tPHL tPHL MS, MR to Output ns tPHL tTHL 20% to 80% ,8 0% to 20% ts Setup Time Figure 5 (Note 10) D n 1.00 0.80 0.90 CD n,S Dn (Release Time) 1.50 1.30 1.60 ns Figure 4 MS, MR (Release Time) 2.50 2.30 2.50 th Hold Time Dn 1.50 1.30 1.60 ns Figure 5 tpw (H) Pulse Width HIGH CP n,C PC ,C Dn, 2.00 2.00 2.00 ns Figures 3, 4 SD n, MR, MS Note 7:F100K 300 Series cold temperature testing is performed by temperature soaking (to guarantee junction temperature equals −55˚C), then testing immediately without allowing for the junction temperature to stabilize due to heat dissipation after power-up. This provides “cold start” specs which can be considered a worst case condition at cold temperatures. Note 8:Screen tested 100% on each device at +25˚C. Temperature only, Subgroup A9. Note 9:Sample tested (Method 5005, Table I) on each Mfg. lot at +25˚C, Subgroup A9, and at +125˚C, and −55˚C Temp., Subgroups A10 and A11. Note 10:Not tested at +25˚C, +125˚C and −55˚C Temperature (design characterization data). www.national.com 4

Physical Dimensionsinches (millimeters) unless otherwise noted 24-Lead Ceramic Dual-In-Line Package (0.400" Wide) (D) 24-Lead Quad Cerpak (F) www.national.com7

NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DE- VICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMI- CONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or sys- tems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose fail- ure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 2. A critical component in any component of a life support device or system whose failure to perform can be rea- sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. National Semiconductor Corporation Americas Tel: 1-800-272-9959 Fax: 1-800-737-7018 Email: support@nsc.com www.national.com National Semiconductor Europe Fax: +49 (0) 1 80-530 85 86 Email: europe.support@nsc.com Deutsch Tel: +49 (0) 1 80-530 85 85 English Tel: +49 (0) 1 80-532 78 32 Français Tel: +49 (0) 1 80-532 93 58 Italiano Tel: +49 (0) 1 80-534 16 80 National Semiconductor Asia Pacific Customer Response Group Tel: 65-2544466 Fax: 65-2504466 Email: sea.support@nsc.com National Semiconductor Japan Ltd. Tel: 81-3-5620-6175 Fax: 81-3-5620-6179 National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.