SD7500 SDIC | Alldatasheet
Document overview
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- PDF pages: 9
Technical content
Features
6 channels ADC, 4000 counts, auto- range measurement AC true RMS output, measurement error< 0.5% at 2kHz passband corner Built-in voltage divider, no external resistor divider needed Programmable multi -functional measurement network，support voltage, current, resistor, diode, transistor, open/short, temperature, and capacitor measurements Multi-functional comparator 8 bits RISC ultra -low power MCU , 49 instructions and 6 stack levels. The MCU current consumption is 400uA typically at 3 .3V and 2MHz oper ating clock rate. Standby current is 1.5uA at 32kHz clock, and less than 1uA at sleep 16k Bytes OTP for program storage, 256 Bytes SRAM for data storage Low OTP programming voltage , can replace external EEPROM Flexible battery voltage detection range 2.0V~ 3.3V Abundant peripheral resources: UART, PWM, PFD, BUZ, and TIMER 14SEG × 4COM LCD drive, ultra -low power consumption and high driving capability, programmable boost module to maintain luminance at low supply voltage, support grey scale adjustment. Support grey scale adjustment Every digital I/O port contain Schmitt trigger input and selectable pull up resistor Low voltage detection and power on reset circuit Operating voltage range: 2.4V~ 3.6V Operating temperature range: -40 ˚C~85 ˚C Built-in 8MHz and 32kHz RC oscillators
Description
The SD7500 is a S oC wi th built-in 24 bit ADC and 16k Bytes OTP memory . The IC was designed with ultra -low power technology. Operates at 3.3V supply and internal RC oscillator frequency , the total typical operating current is 1.6mA. It has very rich peripheral resources: selectable regulated voltage source, flexible ADC setup, voltage booster, UART, TIMER with CAPTURE capability , PWM, PFD, and LCD driver. The OTP can be programmed in situ and the 2.4V~3.6V programming voltage is generated internally. The OTP can be used in place of external EEPROM. Three working modes are provided so users can select the optimum choice between speed and power . They are normal mode, standby mode, and sleep mode.
Applications
Manual or a uto-range multimeter and similar measurement applications
Ordering Information
Figure 1. Pin out diagram
Table 1. Pin Descriptions
1 VPP Analog OTP high voltage programming pin, connect 1uF capacitor to VSS
3 VSS Ground Power ground
6 A0/LBTIN0 Analog
resistor (default OFF), should set to ON for unused port.
13 P11/INT0/LBTIN1 I/O Digital port P11, external interrupt INT0, or low battery detect LBTIN1 input
14 P12/INT0/LBTIN2 I/O Digital port P12, external interrupt INT0, or low battery detect LBTIN2 input
15 P13/INT0/RXD I/O Digital port P13, external interrupt INT0, or UART’s RXD port
16 P14/INT0/TXD I/O Digital port P14, external interrupt INT0, or UART’s TXD port
22 P25/BUZ I/O Digital port P25 or buzzer BUZ output
23 P26/SEG13/BUZB I/O Digital port P26, LCD segment SEG13, or buzzer BUZB output
24 P27/SEG12/PFD/P
41 RST_B I External reset input, active low, internal 200k pull up resistor
42 VLCD Analog LCD driver power supply, internally connect to VDD or
Remark: All I/O ports Pnn have internal pull-up option (default OFF) and input hysteresis at 0.3VDD/0.7VDD.
256 Bytes
Figure 2. Functional block diagram
1 N4004
Figure 3. Multimeter typical application diagram
Table 2. ENOB and voltage noise Vnrms The above data are averages based on multiple ICs’ measured results. Each IC contributes 1024 data points. , FRS is the Full Scale V oltage Range (2 * Vref / Gain), Vrms is the rms Noise.
Table 3. Absolute Maximum Ratings
- CMOS device can easily be damaged by electrostatics. It must be stored in conductive foam, and careful not to exceed the
- Turn off power before insert or remove the device.
Table 4. Electrical Specifications（VDD=3.3V, TA=25℃）
SDIC Microelectronics Rev. 0.1 Apr 2018 http://www .SDICmicro.com 8 of 9 VIN PGIA input voltage range2 -0.3 -- A VDDR 1X gain and buffer is off 0.3 -- A VDDR-0.7 1X gain and buffer is on, or gain≠1 Vnrms RMS noise -- 2.80 -- uVrms 1X gain and OSR=16384 Va cm ACM voltage output -- 1.2 -- V IacmSour ACM current source -- 1 -- mA IacmSink ACM current sink -- 1 -- mA PSRacm ACM PSR -- 100 -- uV/V Vavddr A VDDR voltage output -- 2.4 -- V A VDDRX[1:0]=00 -- VDD -- A VDDRX[1:0]=01 Iavddr A VDDR current -- 10 -- mA POR Power On Reset voltage -- 2.0 -- V LVD Low V oltage Detect reset voltage -- 1.9 -- V THlbt LVD hysteresis -- 200 -- mV Vlcd LCD charge pump output voltage -- 2.1 -- V VLCDX[2:0]=000 Ilcd LCD charge pump current3 -- -- 500 uA Digital I/O parameter IOH High output current source -- 3 -- mA VOL=VDD-0.3V, PTxSR=0 -- 12 -- VOL=VDD-0.3V, PTxSR=1 IOL Output low current sink -- 3 -- mA VOH=0.3V, PTxSR=0 -- 12 -- VOH=0.3V, PTxSR=1 VIH Input high voltage 0.7VDD -- -- V VIL Input low voltage -- -- 0.3VDD V VOH Output high voltage VDD-0.3 -- -- V VOL Output low voltage -- -- VSS+0.3 V Rpu Pin pull up resistance -- 200 -- kΩ VDD = 3.0 Note: 1． Noise free bits and effective resolution are both related to the signal’s full scale range. Its peak to peak or rms noise plays the decisive role. 2． The signal input range is limited by the differential signal input range and the absolute voltage at the input terminals. The first one is the real signal input range. It is affected by the PGIA gain and the ADC voltage reference choice. The second one includes both differential and common mode components and is mainly limited by the circuit. 3． The charge pump driving capability is related to the choice of capacitor and the operating frequency.
Figure 4. LQFP44 mechanical specification